MC33975ATEKSLASHR2 datasheet(21/32 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33975

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

EXAMPLE OF NORMAL MODE OPERATION

The operation of the device in Normal mode is defined by the

states of the programmable internal control registers. A

typical application may have the following settings:

• Programmable switch – set to switch-to-ground

• All inputs set as wake-up

• Wetting current on (32 mA)

• Wetting current timer on (20 ms)

• All inputs tri-state-disabled (comparator is active)

• Analog select 00000 (no input channel selected)

With the device programmed as above, an interrupt will be

generated with each switch contact change of state (open-to-

close or close-to-open) and 32 mA of contact wetting current

will be source for 20 ms. The INT pin will remain low until

switch status is acknowledged by the microprocessor. It is

critical to understand INT will not be cleared on the rising

edge of CS if a switch closure occurs while the CS is low. The

maximum duration a switch state change can exist without

acknowledgement depends on the software response time to

the interrupt. Figure 6, page 11, shows the interaction

between changing input states and the INT and CS pins.

If desired the user may disable interrupts (wake-up/interrupt

command) from the 33975 device and read the switch states

on a periodic basis. Switch activation and deactivation faster

than the MCU read rate will not be acknowledged.

The 33975 device will exit the Normal mode and enter the

Sleep mode only with a valid sleep command.

SLEEP MODE

Sleep mode is used to reduce system quiescent currents.

Sleep mode may be entered only by sending the sleep

command. All register settings programmed in Normal mode

will be maintained in Sleep mode.

The 33975 will exit Sleep mode and enter Normal mode when

any of the following events occur:

• Input switch change of state (when enabled)

• Interrupt timer expire

• Falling edge of WAKE

• Falling edge of INT (with VDD = 5.0 V and WAKE at

Logic [1])

• Falling edge of CS (with VDD = 5.0 V)

• Power-on reset (POR)

The VDD supply may be removed from the device during

Sleep mode. However removing VDD from the device in

Sleep mode will disable a wake-up from falling edge of INT

and CS.

Note: In cases where CS is used to wake the device, the first

SO data message is not valid.

The sleep command contains settings for two programmable

timers for Sleep mode, the interrupt timer and the scan timer,

as shown in Table 18.

Table 16. Serial Output (SO) Bit Data

Type of Input

Input

Programmed

Voltage on Input

SO SPI Bit

Switch to Ground

SPn < 4.0 V

Switch to Ground

SPn > 4.0 V

Switch to Battery

SPn < 4.0 V

Switch to Battery

SPn > 4.0 V

N/A

SGn < 4.0 V

N/A

SGn > 4.0 V

Table 17. Serial Output (SO) Response Register

SO Response

Will

Always Send

ther

flg

RST

flg

SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 SG1

SG1

SG9 SG8 SG7 SG6 SG5 SG4 SG3 SG2 SG1 SG0

Table 18. Sleep Command

Sleep Command

Command Bits

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