AD7151 datasheet(22/28 Pages) AD

22 / 28 page

AD7151

Rev. 0 | Page 22 of 28

If a repeated start condition is encountered after the address

pointer byte, all peripherals connected to the bus respond

exactly as outlined previously for a start condition; that is, a

repeated start condition is treated the same as a start condition.

When a master device issues a stop condition, it relinquishes

control of the bus, allowing another master device to take

control of the bus. Therefore, a master wanting to retain control

of the bus issues successive start conditions known as repeated

start conditions.

AD7151 RESET

To reset the AD7151 without having to reset the entire serial bus,

an explicit reset command is provided. This uses a particular

address pointer word as a command word to reset the part and

upload all default settings. The AD7151 does not respond to the

serial bus commands (do not acknowledge) during the default

values upload for approximately 2 ms.

The reset command address word is 0xBF.

GENERAL CALL

When a master issues a slave address consisting of seven 0s with

the eighth bit (R/W bit) set to 0, this is known as the general call

address. The general call address is for addressing every device

connected to the serial bus. The AD7151 acknowledges this

address and reads in the following data byte.

If the second byte is 0x06, the AD7151 is reset, completely

uploading all default values. The AD7151 does not respond to

the serial bus commands (do not acknowledge) during the

default values upload for approximately 2 ms.

The AD7151 does not acknowledge any other general call

commands.

1–7

START ADDR R/W ACK SUBADDRESS ACK

DATA

ACK

STOP

SDATA

SCLOCK

Figure 40. Bus Data Transfer

DATA

A(S)

S SLAVE ADDR A(S)

SUB ADDR

A(S)

LSB = 0

LSB = 1

DATA

S SLAVE ADDR A(S)

SUB ADDR A(S) S SLAVE ADDR A(S)

DATA

A(M)

DATA

WRITE

SEQUENCE

READ

SEQUENCE

A(S) = NO ACKNOWLEDGE BY SLAVE

A(M) = NO ACKNOWLEDGE BY MASTER

A(S) = ACKNOWLEDGE BY SLAVE

A(M) = ACKNOWLEDGE BY MASTER

S = START BIT

P = STOP BIT

A(S)

A(M)

Figure 41. Write and Read Sequences

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