TC74ACT299P/F

2007-10-01

2

IEC Logic Symbol

Truth Table

Inputs

Inputs/

Outputs

Outputs

Function

Select

Outputs Control

Serial

Mode

CLR

S1

S0

1

G

(Note)

2

G

(Note)

CK

SL

SR

A/QA H/QH

QA’

QH’

Z

L

H

H

X

X

X

X

X

Z

Z

L

L

L

L

X

L

L

X

X

X

L

L

L

L

Clear

L

X

L

L

L

X

X

X

L

L

L

L

Hold

H

L

L

L

L

X

X

X

QA0

QH0

QA0

QH0

Shift

H

L

H

L

L

X

H

H

QGn

H

QGn

Right

H

L

H

L

L

X

L

L

QGn

L

QGn

Shift

H

H

L

L

L

H

X

QBn

H

QBn

H

Left

H

H

L

L

L

L

X

QBn

L

QBn

L

Load

H

H

H

X

X

X

X

a

h

a

h

Note:

When one or both output controls are high, the eight input/output terminals are in the high-impedance state;

however sequential or clearing of the register is not affected.

Z: High impedance

Qn0: The level of Qn before the indicated steady-state input conditions were established.

Qnn: The level of Qn before the most recent active transition indicated by

↓ or ↑.

a, h: The level of the steady-state inputs A, H, respectively.

X: Don’t care