UPD301A datasheet(13/40 Pages) MICROCHIP

13 / 40 page

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DS00002838C-page 13

UPD301A

I2C Address

Select

Configuration

Strap

I2C_ADDR_SEL

AIO

This multi-level configuration signal is sampled after a sys-

tem reset to select the device’s default I2C slave address.

Refer to Section 3.3, "Configuration Straps" for additional

information.

Boot Select

Configuration

Strap

BOOT_SEL

This configuration strap is sampled after a system reset to

select between a normal boot or a boot ROM boot using a

200KΩ pull-down/up resistor.

0 = Boot from boot ROM

1 = Normal operation

Refer to Section 3.3, "Configuration Straps" for additional

information.

DC/DC

Converter

Configuration

Strap

DC_DC_SEL

I/O2

This configuration strap is sampled after a system reset to

select which DC/DC converter the DAC output is configured

for.

Refer to Section 3.3, "Configuration Straps" for additional

information.

Power/Ground

+5V

Port Power

Switch Input

VCONN_IN

+5V VCONN FET power source.

+3.3V I/O

Power Supply

Input

VDD33_IO_IN

+3.3V I/O power supply input.

+3.3V Analog

Power Supply

Input

VDD33_ANA_IN

+3.3V analog power supply input.

+3.3V

Always Supply

Input

VDD33_ALW_IN

+3.3V always supply input.

Note:

This pin must be connect to a 2.2 uF capacitor

to ground.

+3.3V

Regulator

Power Supply

Input

VDD33_REG_IN

+3.3V regulator power supply input.

+1.8V Core

Voltage Power

Supply Input

VPP18

+1.8V core voltage power supply input.

+1.8V Digital

Core Power

Supply Output

VDD18_CORE_OUT

+1.8V digital core power supply output. This signal must be

connected to a 1uF capacitor to ground for proper opera-

tion.

+1.2V

Core Power

Supply Output

VDD12_CORE_OUT

+1.2V core power supply output. This signal must be con-

nected to a 1uF capacitor to ground for proper operation.

Ground

VSS

Ground pins.

TABLE 3-2:

PIN DESCRIPTIONS (CONTINUED)

Name

Symbol

Buffer

Type

Description

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