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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP86FS49AIUG датащи(PDF) 162 Page - Toshiba Semiconductor |
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TMP86FS49AIUG датащи(HTML) 162 Page - Toshiba Semiconductor |
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162 / 296 page  Page 146 12. Asynchronous Serial interface (UART1 ) 12.9 Status Flag TMP86FS49AIUG Figure 12-7 Generation of Overrun Error Note:Receive operations are disabled until the overrun error flag UART1SR<OERR> is cleared. 12.9.4 Receive Data Buffer Full Loading the received data in RD1BUF sets receive data buffer full flag UART1SR<RBFL> to "1". The UART1SR<RBFL> is cleared to “0” when the RD1BUF is read after reading the UART1SR. Figure 12-8 Generation of Receive Data Buffer Full Note:If the overrun error flag UART1SR<OERR> is set during the period between reading the UART1SR and read- ing the RD1BUF, it cannot be cleared by only reading the RD1BUF. Therefore, after reading the RD1BUF, read the UART1SR again to check whether or not the overrun error flag which should have been cleared still remains set. 12.9.5 Transmit Data Buffer Empty When no data is in the transmit buffer TD1BUF, UART1SR<TBEP> is set to “1”, that is, when data in TD1BUF are transferred to the transmit shift register and data transmit starts, transmit data buffer empty flag UART1SR<TBEP> is set to “1”. The UART1SR<TBEP> is cleared to “0” when the TD1BUF is written after reading the UART1SR. Final bit Stop Shift register xxxx0* 1xxxx0 yyyy xxx0** RXD1 pin UART1SR<OERR> INTRXD1 interrupt After reading UART1SR then RD1BUF clears OERR. RD1BUF UART1SR<RBFL> Final bit Stop Shift register xxxx0* 1xxxx0 xxxx yyyy xxx0** RXD1 pin UART1SR<RBFL> INTRXD1 interrupt RD1BUF After reading UART1SR then RD1BUF clears RBFL. |
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