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Rev1.3 Oct.08 2019

AX3077

Output Capacitor

The output capacitor also needs to have low ESR to keep low output voltage ripple.

The output ripple voltage is:

OUT

2

LX

IN

ESR

RIPPLE

OUTMAX

RIPPLE

LC

f

×

28

V

+

R

K

I

=

V

where IOUTMAX is the maximum output current, KRIPPLE is the ripple factor, RESR is the

ESR of the output capacitor, fLX is the switching frequency, L is the inductor value, and

COUT is the output capacitance. In the case of ceramic output capacitors, RESR is very

small and does not contribute to the ripple. Therefore, a lower capacitance value can be

used for ceramic type. In the case of tantalum or electrolytic capacitors, the ripple is

dominated by RESR multiplied by the ripple current. In that case, the output capacitor is

chosen to have sufficiently low ESR.

For ceramic output capacitor, typically choose a capacitance of about 470μF. For

tantalum or electrolytic capacitors, choose a capacitor with less than 50mΩ ESR.

PCB Layout Recommendations

1. PCB trace defined as LX node, which connects to source of switching MOSFET, drain

of rectifying MOSFET and high-voltage side of the inductor, should be as short and

wide as possible.

2. All sensitive analog traces such as SEN1, SEN2, COMP and FB should place away

from high-voltage switching nodes such as LX, UG or LG nodes to avoid coupling.

3. C8 input bypass capacitor should be placed to the VIN pin as close as possible.

4. Connections from the drivers to the respective gate of the high-side or the low-side

MOSFET should be as short as possible to reduce stray inductance. Use a 0.65 mm

(25 mils) or wider trace.

5.

Gather the ground terminals of the VIN capacitor(s), VOUT capacitor(s), and the source

of the low-side MOSFETs as close as possible. Signal ground and power ground

should be connected strongly together near the device.