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D8255 датащи(PDF) 2 Page - Digital Core Design

номер детали D8255
подробное описание детали  Programmable Peripheral Interface
PDF  4 Pages
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производитель  DCD [Digital Core Design]
домашняя страница  http://www.digitalcoredesign.com
Logo DCD - Digital Core Design

D8255 датащи(HTML) 2 Page - Digital Core Design

  D8255 Datasheet HTML 1Page - Digital Core Design D8255 Datasheet HTML 2Page - Digital Core Design D8255 Datasheet HTML 3Page - Digital Core Design D8255 Datasheet HTML 4Page - Digital Core Design  
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All trademarks mentioned in this document
are trademarks of their respective owners.
Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.
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http://www.DigitalCoreDesign.com
http://www.dcd.pl
Group B – Port B and lower half of Port C
KEY FEATURES
Compatible with industry standard 8255
24 I/O lines
individually programmed in
2 groups of 12:
Group A - Port A and upper half of Port C
3 major modes of operation
Mode 0 – Basic input/output
Mode 1 – Strobed Input/output
Mode 2 – Bi-directional Bus
Control Word Read-Back Capability
Direct Bit Set/Reset Capability
Interrupt control functions
No internal three states busses
Fully synthesizable technology independ-
ent source code.
DESIGN FEATURES
ONE GLOBAL SYSTEM CLOCK
SYNCHRONOUS RESET
ALL ASYNCHRONOUS INPUT SIGNALS ARE
SYNCHRONIZED BEFORE INTERNAL USE
ALL LATCHES IMPLEMENTED IN ORIGINAL
8255 DEVICES ARE REPLACED BY EQUIVA-
LENT FLIP
-FLOP REGISTERS, WITH THE SAME
FUNCTIONALITY
APPLI C ATIONS
Embedded microprocessor boards
Interface to the printer
I/O component to interface peripheral
equipment to the microcomputer system
bus
SYMBOL
datai(7:0)
datao (7:0)
we
rd
cs
rst
clk
a(1:0)
portai(7:0)
portao (7:0)
portbi(7:0)
portbo (7:0)
portci(7:0)
portco (7:0)
PINS DESCRIPTI O N
PIN
TYPE
DESCRIPTION
clk
input
Global clock
reset
input
Global reset
cs
input
Chip select
rd
input
Processor read strobe
we
input
Processor write strobe
a[1:0]
input
Processor address lines
portai[7:0]
input
Port A input
portbi[7:0]
input
Port B input
portci[7:0]
input
Port C input
datai[7:0]
input
Data bus (input)
datao[7:0]
output
Data bus (output)
portao[7:0]
output
Port A output
portbo[7:0]
output
Port B output
portco[7:0]
output
Port C output
BLOCK DIAGRAM
Data Bus Buffer
– The Data Bus Buffer is
used to interface the D8255 to the system
data bus. Data is transmitted or received by
the buffer upon execution of input or output
instructions by the CPU. Control words and
status
information
are
also
transferred
through the data bus buffer.
Read/Write and Control Logic
- The control
logic block manages all of the internal and
external transfers of both Data and Control or
Status words. It accepts inputs from the CPU
Address and Control busses and in turn, is-
sues commands to both of the Control
Groups A and B.



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