SM5956A

SEIKO NPC CORPORATION —13

Output mode select

Output timing

See the timing for each of the output formats in figures 10 to 18. In slave mode, note that the LRCO and BCKO

as timing shown in figures 10 to 14 must be inputted externally. In through mode, note that the LRCI, BCKI,

DI* inputs are passed to the outputs as-is, regardless of the output data format setting, and that DITO is a

LOW-level output.

Note. DI*: DIA, DIB, DIC pins

DO*: DOA, DOB, DOC pins

Output-System Clock (SCK, SCKSLN pins)

The output-system clock input must have a frequency of either 512fso or 768fso, where fso is the output-sys-

tem sampling frequency. In master mode, the LRCO and BCKO signals are derived from this clock input by

frequency division. This clock is also used as the system clock by the internal processing circuits.

Pins

Function

THROUN

SLAVEN

Mode

Description

LRCO, BCKO pin state

H

H

Master

LRCO, BCKO are derived by frequency division of

the SCK input clock.

Outputs

LSlave

LRCO, BCKO are supplied externally.

When SCKSLN = L, BCKO is set to 64fso.

When SCKSLN = H, BCKO is set to 48fso.

Inputs

L

L or H

Through

The LRCI, BCKI, DIA, DIB, DIC inputs are fed

directly to the LRCO, BCKO, DO* outputs.

The DITO output is LOW-level.

Outputs

SCKSLN

SCK input

L

512fso (fso = output-system sampling frequency)

LRCO rate

→ 1fso

BCKO rate

→ 64fso

H

768fso (fso = output-system sampling frequency)

LRCO rate

→ 1fso

BCKO rate

→ 48fso