DS26504LN datasheet(2/128 Pages) MAXIM

2 / 128 page

DS26504 T1/E1/J1/64KCC BITS Element

2 of 128

TABLE OF CONTENTS

FEATURES .......................................................................................................................7

1.1

GENERAL .....................................................................................................................................7

1.2

LINE INTERFACE ...........................................................................................................................7

1.3

JITTER ATTENUATOR (T1/E1 MODES ONLY) ..................................................................................7

1.4

FRAMER/FORMATTER ...................................................................................................................8

1.5

TEST AND DIAGNOSTICS ...............................................................................................................8

1.6

CONTROL PORT............................................................................................................................8

SPECIFICATIONS COMPLIANCE ...................................................................................9

BLOCK DIAGRAMS .......................................................................................................11

PIN FUNCTION DESCRIPTION .....................................................................................14

4.1

TRANSMIT PLL ...........................................................................................................................14

4.2

TRANSMIT SIDE ..........................................................................................................................14

4.3

RECEIVE SIDE ............................................................................................................................15

4.4

CONTROLLER INTERFACE............................................................................................................16

4.5

JTAG.........................................................................................................................................20

4.6

LINE INTERFACE .........................................................................................................................21

4.7

POWER ......................................................................................................................................21

PINOUT...........................................................................................................................22

HARDWARE CONTROLLER INTERFACE....................................................................25

6.1

TRANSMIT CLOCK SOURCE .........................................................................................................25

6.2

INTERNAL TERMINATION..............................................................................................................25

6.3

LINE BUILD-OUT .........................................................................................................................26

6.4

RECEIVER OPERATING MODES....................................................................................................27

6.5

TRANSMITTER OPERATING MODES..............................................................................................27

6.6

MCLK PRE-SCALER ...................................................................................................................28

6.7

PAYLOAD CLOCK OUTPUT...........................................................................................................28

6.8

OTHER HARDWARE CONTROLLER MODE FEATURES ....................................................................29

PROCESSOR INTERFACE ............................................................................................30

7.1

PARALLEL PORT FUNCTIONAL DESCRIPTION................................................................................30

7.2

SPI SERIAL PORT INTERFACE FUNCTIONAL DESCRIPTION............................................................30

7.2.1

Clock Phase and Polarity..................................................................................................................... 30

7.2.2

Bit Order............................................................................................................................................... 30

7.2.3

Control Byte ......................................................................................................................................... 30

7.2.4

Burst Mode........................................................................................................................................... 30

7.2.5

Register Writes..................................................................................................................................... 31

7.2.6

Register Reads .................................................................................................................................... 31

7.3

REGISTER MAP...........................................................................................................................32

7.3.1

Power-Up Sequence ............................................................................................................................ 34

7.3.2

Test Reset Register ............................................................................................................................. 34

7.3.3

Mode Configuration Register ............................................................................................................... 35

7.4

INTERRUPT HANDLING ................................................................................................................37

7.5

STATUS REGISTERS....................................................................................................................37

7.6

INFORMATION REGISTERS...........................................................................................................38

7.7

INTERRUPT INFORMATION REGISTERS .........................................................................................38

DS26504LN датащи(PDF) 2 Page - Maxim Integrated Products

DS26504LN датащи(HTML) 2 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL