LP3958 Register Bit Explanations

Each register is shown with a key indicating the accessibility of the each individual bit, and the initial condition:

Register Bit Accessibility and Initial Condition

Key

Bit Accessibility

RW

Read/write

R

Read only

–0,–1

Condition after POR

CONTROL REGISTER (00H) – KEYPAD LEDS CONTROL REGISTER

D7

D6

D5

D4

D3

D2

D1

D0

KEYP_PWM

EN_KEYP

CC_SW

K1SW

K2SW

K3SW

RW-0

RW-0

RW-1

R-0

RW-0

RW-0

RW-0

R-0

KEYP_PWM

Bit 7

0 - Internal KEYPAD PWM control disabled

1 - Internal KEYPAD PWM control enabled

EN_KEYP

Bit 6

0 – KEYPAD outputs disabled

1 – KEYPAD outputs enabled

CC_SW

Bit 5

0 – Constant current sink mode

1 – Switch mode

K1SW

Bit 3

0 – KEYPAD1 disabled

1 – KEYPAD1 enabled

K2SW

Bit 2

0 – KEYPAD2 disabled

1 – KEYPAD2 enabled

K3SW

Bit 1

0 – KEYPAD3 disabled

1 – KEYPAD3 enabled

KEYPAD (01H) – KEYPAD BALANCE AND BRIGHTNESS CONTROL REGISTER

D7

D6

D5

D4

D3

D2

D1

D0

BALANCE[2:0]

BRIGHT[2:0]

OVL

R-0

RW-0

RW-0

RW-0

RW-0

RW-0

RW-0

RW-0

BALANCE[2:0]

Bits 6-4

PWM balance for KEYPAD outputs

BRIGHT[2:0]

Bits 3-1

PWM brightness control for KEYPAD outputs

OVL

Bit 0

0 – Overlapping mode disabled

1 – Overlapping mode enabled

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