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ADS8513 датащи(PDF) 21 Page - Texas Instruments

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номер детали ADS8513
подробное описание детали  16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE
PDF  24 Pages
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домашняя страница  http://www.ti.com
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ADS8513 датащи(HTML) 21 Page - Texas Instruments

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DATA
DATACLK
CS
BYTE
PCS0
PCS1
SCK
QSPI
ADS8513
CPOL = 0
CPHA = 0
+ 5 V
EXT/INT
MISO
CONV
SPI™ INTERFACE
ADS8513
SLAS486 – JUNE 2007
APPLICATION INFORMATION (continued)
Figure 19. QSPI Interface to the ADS8513, Processor Initiates Conversions
In this configuration, the QSPI interface is actually set to do two different serial transfers. The first, an 8-bit
transfer, causes PCS0 (R/C) and PCS1 (CS) to go low, starting a conversion. The second, a 16-bit transfer,
causes only PCS1 (CS) to go low. This is when the valid data is transferred.
For both transfers, the DT register (delay after transfer) is used to cause a 19-
μs delay. The interface is also set
up to wrap to the beginning of the queue. In this manner, the QSPI is a state machine which generates the
appropriate timing for the ADS8513. This timing is thus locked to the crystal-based timing of the microcontroller
and not interrupt driven. So, this interface is appropriate for both AC and DC measurements.
For the fastest conversion rate, the baud rate should be set to 2 (4.19-MHz SCK), DT set to 10, the first serial
transfer set to 8 bits, the second set to 16 bits, and DSCK disabled (in the command control byte). This allows for
a 23-kHz maximum conversion rate. For slower rates, DT should be increased. Do not slow SCK as this may
increase the chance of affecting the conversion results or accidently initiating a second conversion during the first
8-bit transfer.
In addition, CPOL and CPHA should be set to zero (SCK normally low and data captured on the rising edge).
The command control byte for the 8-bit transfer should be set to 20H and for the 16-bit transfer to 61H.
The SPI interface is generally only capable of 8-bit data transfers. For some microcontrollers with SPI interfaces,
it might be possible to receive data in a similar manner as shown for the QSPI interface in Figure 18. The
microcontroller needs to fetch the 8 most significant bits before the contents are overwritten by the least
significant bits.
A modified version of the QSPI interface shown in Figure 19 might be possible. For most microcontrollers with a
SPI interface, the automatic generation of the start-of-conversion pulse is impossible and has to be done with
software. This limits the interface to DC applications due to the insufficient jitter performance of the convert pulse
itself.
Copyright © 2007, Texas Instruments Incorporated
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