STW81101AT datasheet(11/48 Pages) STMICROELECTRONICS

11 / 48 page

STW81101

Electrical specifications

11/48

VCTRL

VCO control voltage(5)

0.4

LO harmonic spurious(5)

-20

dBc

IVCOA

VCOA current consumption

FVCO=3.6GHz; amplitude [11]

FVCO=3.6GHz; amplitude [00]

IVCOB

VCOB current consumption

FVCO=4.1GHz; amplitude [11]

FVCO=4.1GHz; amplitude [00]

IVCOBUF

VCO buffer consumption

IDIV2

Divider by 2 consumption

IDIV4

Divider by 4 consumption

LO output buffer

PLO

Output level

dBm

Return loss(5)

Matched to 50 ohms

IOUTBUF

Current consumption

DIV4 buff

DIV2 buff

Direct output

External VCO (for test purposes only)

Frequency range

3.3

4.4

GHz

Input level

dBm

Current consumption

VCO internal buffer

PLL miscellaneous

IPLL

Current consumption

Input buffer, prescaler, digital

dividers, misc.

tlock

Lock up time (5),(6)

25 kHz PLL bandwidth; within

1 ppm of frequency error

150

µs

In order to achieve best phase noise performance 1V peak level is suggested.

The frequency step is related to the PFD input frequency as follows:

- Fstep = FPFD for direct output

- Fstep = FPFD/2 for divided by 2 output

- Fstep = FPFD/4 for divided by 4 output

See the relationship between ICP and REXT in

Section 5.7: Charge pump.

The level of the spurs may change depending on PFD frequency, charge pump current, selected channel and PLL loop

BW.

Guaranteed by design and characterization.

Frequency jump from 1950 to 1800 MHz; it includes the time required by the VCO calibration procedure (7 FPFD cycles with

FPFD=400kHz).

Table 5.

Electrical specifications (continued)

Symbol

Parameter

Test conditions

Min

Typ

Max

Unit

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