SC312XDP512F0MPVR datasheet(202/1350 Pages) FREESCALE

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Chapter 6 XGATE (S12XGATEV2)

MC9S12XDP512 Data Sheet, Rev. 2.17

202

Freescale Semiconductor

6.4

Functional Description

The core of the XGATE module is a RISC processor which is able to access the MCU’s internal memories

and peripherals (see Figure 6-1). The RISC processor always remains in an idle state until it is triggered

by an XGATE request. Then it executes a code sequence that is associated with the request and optionally

triggers an interrupt to the S12X_CPU upon completion. Code sequences are not interruptible. A new

XGATE request can only be serviced when the previous sequence is ﬁnished and the RISC core becomes

idle.

The XGATE module also provides a set of hardware semaphores which are necessary to ensure data

consistency whenever RAM locations or peripherals are shared with the S12X_CPU.

The following sections describe the components of the XGATE module in further detail.

6.4.1

XGATE RISC Core

The RISC core is a 16 bit processor with an instruction set that is well suited for data transfers, bit

manipulations, and simple arithmetic operations (see Section 6.8, “Instruction Set”).

It is able to access the MCU’s internal memories and peripherals without blocking these resources from

the S12X_CPU1. Whenever the S12X_CPU and the RISC core access the same resource, the RISC core

will be stalled until the resource becomes available again1.

The XGATE offers a high access rate to the MCU’s internal RAM. Depending on the bus load, the RISC

core can perform up to two RAM accesses per S12X_CPU bus cycle.

Bus accesses to peripheral registers or ﬂash are slower. A transfer rate of one bus access per S12X_CPU

cycle can not be exceeded.

The XGATE module is intended to execute short interrupt service routines that are triggered by peripheral

modules or by software.

6.4.2

Programmer’s Model

Figure 6-19. Programmer’s Model

1. With the exception of PRR registers (see Section “S12X_MMC”).

R0 = 0

Program Counter

Condition

Code

1 0

(Variable Pointer)

3 2

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