RT9244GS datasheet(12/15 Pages) RICHTEK

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RT9244

DS9244-06 March 2007

www.richtek.com

Design Example

Given:

Apply for three phase converter

VIN = 12V

VCORE = 1.5V

ILOAD (MAX) = 60A

VDROOP = 120mV at full load

OCP trip point set at 33A for each channel (S/H)

RDS(ON) = 6m

Ω of low side MOSFET at 27°C

L = 2

μH

COUT = 9,000μF with 2mΩ ESR.

For each channel the load current is 60A / 3 = 20A

and the ripple current,

ΔIL, is given as :

The load current, IL, at S/H is

Using the following formula to select the appropriate

IX (MAX) for the S/H of GM amplifier :

The suggested IX is in the order of 50 to 60

μA, select

RSP = RSN = 2k

Ω, then IX (MAX) will be 55μA.

VDROOP = 120mV = 55

μA × 2 × 3 (phase no.) × RADJ,

therefore RADJ will be 360

Ω.

The RDS(ON) of MOSFET varies with temperature rise.

When the low side MOSFET working at 70

°C and

5000ppm/

°C temperature coefficient of RDS(ON), the

RDS(ON) at 70

°C is given as :

Ω × {1+ (70°C − 27°C) × 5000ppm/°C} = 7.3mΩ.

RADJ at 70

°C is given as :

RADJ_27°C × (RDS(ON)_27°C / RDS(ON)_70°C) = 296Ω

OCP trip point is internally set at around 100

μA of IX

for each channel. As above-selected RSP = RSN= 2k

Ω,

the OCP trip point is found using :

DS(ON)

L (TRIP)

X (OCP)

6mΩ 33A

100 A

R2k

CSS = 0.1

μF is the suitable value for most application.

Figure 5.

DACOUT

R3,C3 are used in type

3 compensation scheme

(left NC in type 2)

COMP

> VDIF

Asymptotic Bode Plot of PWM Loop Gain

-60

-40

-20

100

1000

10000

100000

1000000 10000000

Frequency (Hz)

100

10K

100K

10M

Uncompensated EA Gain

Compensated EA Gain

Modulator Gain

PWM Loop Gain

Figure 6.

From the following formulas :

⎟

⎠

⎞

⎜

⎝

⎛

Middle Band Gain =

By calculation, the FZ = 1kHz, FP = 200kHz and

Middle Band Gain is 10 (i.e 20dB).

The asymptotic bode plot of EA compensation and

PWM loop gain is shown as Figure 6.

4. Soft-Start Capacitor Selection

1. Compensation Setting

a. Modulator Gain, Pole and Zero :

From the following formula :

Modulator Gain =

= 4.2 (12.46dB)

where VRAMP : ramp amplitude of sawtooth wave

LC Filter Pole =

= 1.2kHz and

ESR Zero =

= 8.8kHz

b. EA Compensation Network :

Select R1 = 2.4k

Ω, R2 = 24kΩ, C1 = 6.6nF,

C2 = 33pF and use the type 2 compensation

scheme shown in Figure 5.

RAMP

12V

1.9V

OUT

2π x ESR x C

L =

−

DS(ON)

(MAX)

18.36A

1.5V

5 s x

x 1

3.28A

2uH

12V

⎛⎞

−=

⎜⎟

⎝⎠

2. Droop & DAC Offset Setting

3. Over-Current Protection Setting

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