RT9232

9

DS9232-06 March 2007

www.richtek.com

Application Information

The RT9232 is a single-phase synchronous buck PWM

DC-DC converter controller designed to drive twoN-Channel

MOSFETs. It provides a highly accurate, programmable

output voltage precisely regulated to low voltage

requirement with an internal 0.8V

±1% reference.

Initialization

The RT9232 automatically initiates its softstart cycle only

ready. There is no special power-on sequence should be

took care especially while implement the chip in. The

internal Power-On Reset (POR) logic continually monitors

the voltage level of input power and enabling pin; in which

the IC supply power is monitored via VCC pin and input

with driving capability of 200uA causes a fixed voltage

The RT9232 internal logic will deem the input voltage ready

once the voltage of SENSE pin is high than 1.5V. The

Once all voltages of VCC, SENSE, and EN pins ramp

higher than the internal specific thresholds. The internal

POR logic will initialize the softstart operation then.

Moreover, the POR inhibits driver operation while pulling

the EN pin low. Transitioning EN pin high after input supply

voltages ready to initialize soft-start operation.

Soft-Start

The behavior of RT9232 Soft-Start can be simply described

as shown as Figure.1 below; and the Soft-Start can be

sliced to several time-frames with specific operation

respectively.

T0~T1

The RT9232 initiates the softstart cycle as shown in Figure

1 when POR function is OK. An internal 10uA current

source charges an external capacitor on SS pin (Css) to

5V. The softstart function produces an SSE signal that is

equal to (SS-1.2V)/2. Error Amplifier (EA) and PWM

comparator are triple-input devices. The non-inverting input

whichever is smaller dominates the behavior of the devices.

During T0~T1, since SS is smaller than the sawtooth valley,

the PWM comparator outputs low no matter what the

COMP voltage is.

T1~T2

During T1~T2, EA keeps COMP voltage low that makes

the PWM output low.

T2~T3

SSE ramps up and dominates the behavior of EA during

T2~T3. EA regulates COMP appropriately so that FB

ramps up along the SSE curve. The output voltage ramps

up accordingly. Thus upper MOSFET turns on at a limited

duty and output current overshoot can be reduced.

It is noted that lower MOSFET keeps off before the upper

MOSFET starts switching. This method provides smooth

start up when there is residual voltage on output capacitors.

The output voltage delay time and ramp up time are

calculated as Equation (1) and (2) respectively.

10uA

C

1.6V x

T2

T3

SS

=

−

(s)

(2)

10uA

C

1.2V x

T0

T2

SS

=

−

(s)

(1)

COMP

PWM

EA

FB

SSE

SS

0.8V

SSE

SS

1V

0.8V

FB

COMP

T0

T1T2

T3

5V

Figure 1. Timing diagram of softstart

Ω

−

<

A

200

1.5V

V

R

IN_READY

SENSE

μ