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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10F272 датащи(PDF) 48 Page - STMicroelectronics |
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ST10F272 датащи(HTML) 48 Page - STMicroelectronics |
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48 / 179 page  Central processing unit (CPU) ST10F272 48/179 7.1 Multiplier-accumulator unit (MAC) The MAC co-processor is a specialized co-processor added to the ST10 CPU Core in order to improve the performances of the ST10 Family in signal processing algorithms. The standard ST10 CPU has been modified to include new addressing capabilities which enable the CPU to supply the new co-processor with up to 2 operands per instruction cycle. This new co-processor (so-called MAC) contains a fast multiply-accumulate unit and a repeat unit. The co-processor instructions extend the ST10 CPU instruction set with multiply, multiply- accumulate, 32-bit signed arithmetic operations. Figure 8. MAC unit architecture Operand 2 Operand 1 Control Unit Repeat Unit ST10 CPU Interrupt Controller MSW MRW MAH MAL MCW Flags MAE Mux 8-bit Left/Right Shifter Mux Mux Sign Extend 16 x 16 Concatenation signed/unsigned Multiplier 40-bit Signed Arithmetic Unit 0h 0h 08000h 40 16 40 40 32 32 16 40 40 40 40 40 Scaler AB 40 GPR Pointers * IDX0 Pointer IDX1 Pointer QR0 GPR Offset Register QR1 GPR Offset Register QX0 IDX Offset Register QX1 IDX Offset Register Note: * Shared with standard ALU |
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