M58PR256J datasheet(55/114 Pages) STMICROELECTRONICS

55 / 114 page

M58PR256J, M58PR512J

Enhanced Configuration Register

55/114

Enhanced Configuration Register

The Enhanced Configuration Register (ECR) is used to enable the Deep Power Down mode

and to configure the output driver strength.

The Enhanced Configuration Register is set through the Command Interface using the Set

Enhanced Configuration Register command.

Its contents can be read by issuing the Read Electronic Signature command and then by

reading from the Bank Base Address + 06h.

The ECR is volatile: after a reset or a power-down/power-up sequence the register is set to

the default value. The Configuration Register bits are described in Table 17

8.1

Deep Power-Down Mode bit (ECR15)

The Deep Power-Down Mode Bit, ECR15, is used to enable the Deep Power-Down mode.

The device can only enter the Deep Power-Down mode from standby, by asserting the DPD

pin and setting ECR15 to ‘1’, whatever the order of the last two operations.

When the device is in the Deep Power-Down mode, de-asserting the DPD pin and/or

resetting ECR15 causes the device to revert to the Standby mode.

8.2

Deep Power-Down Polarity bit (ECR14)

The Deep Power-Down Polarity bit is used to set the polarity of the DPD signal.

When:

●

ECR14 = 0, the DPD signal is active Low (default),

●

ECR14 = 1, the DPD signal is active High.

8.3

Output Driver Control bits (ECR2-ECR0)

The Output Driver Control bits, ECR0, ECR1 and ECR2, are used to select the best suited

output driver impedance to the system requirements.

After reset or power-up the Output Driver Control bits are set to the Enhanced Configuration

performance will be obtained only if the output driver impedance is configured properly.

Once a configuration has been selected, all data and WAIT output drivers are set to the

same setting.

Table 17 gives the output driver impedances at VDDQ/2 and the loads that correspond for

each ECR2-ECR0 bit configuration.

M58PR256J датащи(PDF) 55 Page - STMicroelectronics