Pad Assignment

Chip size: 142

´ 141 (mil)

2

* The IC substrate should be connected to VDD in the PCB layout artwork.

Pad Coordinates

Unit: mil

Pad No.

X

Y

Pad No.

X

Y

1

-61.58

63.62

27

25.29

-64.26

2

-61.83

50.83

28

66.98

-62.65

3

-61.83

43.73

29

66.98

-56.01

4

-61.83

37.10

30

66.98

-49.38

5

-61.83

30.47

31

66.98

-42.76

6

-61.83

23.84

32

66.98

-36.13

7

-61.83

17.21

33

66.98

-29.50

8

-61.83

10.58

34

66.98

-22.86

9

-61.83

3.95

35

66.98

-16.24

10

-61.83

-2.68

36

66.98

-9.60

11

-61.83

-9.31

37

66.98

-2.97

12

-61.83

-15.94

38

66.98

3.65

13

-61.83

-22.57

39

66.98

10.28

14

-60.90

-64.26

40

65.71

64.39

15

-54.27

-64.26

41

59.08

64.39

16

-47.64

-64.26

42

52.45

64.39

17

-41.01

-64.26

43

40.59

64.39

18

-34.38

-64.26

44

29.75

64.39

19

-27.75

-64.26

45

22.95

64.39

20

-21.12

-64.26

46

16.32

64.39

21

-14.49

-64.26

47

9.56

64.39

22

-7.86

-64.26

48

-2.21

64.30

23

-1.23

-64.26

49

-21.80

64.39

24

5.40

-64.26

50

-39.52

64.39

25

12.03

-64.26

51

-49.60

63.62

26

18.66

-64.26

HT1620

Rev. 1.30

3

March 27, 2007

1

2 7

2

2 8

3

2 9

4

3 0

5

3 1

6

3 2

7

3 3

8

3 4

9

3 5

1 0

3 6

1 1

3 7

1 2

3 8

1 3

3 9

1 4

4 0

1 5

4 1

1 6

4 2

1 7

4 3

1 8

4 4

1 9

4 5

2 0

4 6

2 1

4 7

2 2

4 8

2 3

4 9

2 4

5 0

2 5

5 1

2 6

( 0 , 0 )

C C 2

V O 1 5 N

V E E

C O M 0

C O M 1

C O M 2

C O M 3

S E G 0

S E G 1

S E G 2

S E G 3

S E G 4

S E G 5

S E G 3 1

S E G 3 0

S E G 2 3

S E G 2 4

S E G 2 5

S E G 2 6

S E G 2 7

S E G 2 8

S E G 2 9

S E G 2 0

S E G 2 1

S E G 2 2