SC416 datasheet(14/34 Pages) SEMTECH

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SC416

If an external capacitor is connected to SS, with no other

components, then the 5uA current into the capacitor cre-

ates a linear voltage ramp. The internal FB comparator

tracks this SS ramp, which forces VOUT to track the SS

ramp. The time in msec needed for the SS ramp to reach

the 750mV reference is:

START

= Css × 150

START

in μsec, Css in nF)

At the end of this time, the SS pin has reached 750mV

and the output voltage is at its nominal value. The FB

comparator then switches over to the internal 750mV

REF, and the SS pin is thereafter ignored. The 5μA cur-

rent source remains on, so the Css capacitor continues to

charge up to +5V.

The SS pin can be connected to a capacitor to provide a

programmable ramp, or connected to a resistor divider

from the other output to provide a synchronized startup,

see the Voltage Tracking section.

The startup waveforms when using a capacitor for the

voltage ramp are shown in Figure 7.

VOUT

750mV

SS linear ramp: 5uA

current source into CSS

CSS

SC416

TSTART

Figure 7

Applications Information (continued)

Shutdown Sequence

Each output has a controlled shutdown. The ramp-down

sequence is optimized for use with an external SS capaci-

tor. When the EN pin is set low, psave mode is disabled

and the shutdown sequence begins. The SS pin stops

sourcing 5uA, and an internal 4K pulldown resistor is en-

abled along with a 5uA current sink. The 4K resistor helps

discharge of the SS capacitor (if used), which was previ-

ously charged to +5V by the 5uA current source. The SS

capacitor discharges quickly; when the SS voltage reach-

es 810mV, the 4K resistor is released, leaving the 5μA cur-

rent sink on (current into the SS pin), which discharges

the SS capacitor from 810mV to 750mV at a slower rate.

When the SS voltage reaches 750mV, the ramp-down at

VOUT begins. With SS at 750mV, the FB comparator ig-

nores the internal 750mV reference and instead uses the

SS ramp-down to regulate VOUT. As the SS pin ramps

down from 750mV due to the current sink, VOUT follows

the SS pin in a linear ramp-down.

Note that psave is disabled during the shutdown cycle

to allow VOUT to actively track the SS ramp-down, even

with no load.

The ramp-down continues until VOUT falls to 300mV as

sensed at the VOUT pin, not the FB pin. At this point the

switching is disabled, the DH and DL drivers are set low

(both MOSFETs off), and an internal 16 ohm pulldown

connects to the VOUT pin to finish soft-discharge of the

output.

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