SC196 datasheet(8/18 Pages) SEMTECH

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if the output voltage decreases by more than 60% of its

programmed value, a soft-start will be invoked.

Current Limit

The PMOS and NMOS power devices of the buck switcher

stage are protected by current limit functions. In the

case of a short to ground on the output, the part enters

frequency foldback mode, which causes the switching

frequency to divide by a factor determined by the output

voltage. This prevents the inductor current from "stair-

casing".

Over-Voltage Protection

Over-voltage protection is provided on the SC196. In the

event of an over-voltage on the output, the PWM drive is

disabled, effectively tri-stating the LX output. The part will

not resume switching until the output voltage has fallen

2% below the regulation voltage.

Soft-Start

The soft-start mode is enabled after every shutdown

cycle to limit in-rush current. In conjunction with the

frequency foldback, this controls the maximum current

during start-up. The PMOS current limit is stepped up

through seven soft-start levels to the full value by a timer

driven from the internal oscillator. During soft-start, the

switching frequency is stepped through 1/8, 1/4, 1/2

and full internal oscillator frequency. The time at which

these steps are made is controlled by the output voltage

reaching predeﬁned threshold levels. When the output

voltage is within 2% of the regulation voltage, soft-start

mode is disabled.

Power Save Mode Operation

The PSAVE mode may be selected by tying the SYNC/PWM

pin to GND. Selecting PSAVE mode will enable the SC196

to automatically activate/deactivate operation at light

loads, maximizing efﬁciency across the full load range.

The SC196 automatically detects the load current at which

it should enter PSAVE mode. The SC196 is optimized to

track maximum efﬁciency with respect to V

IN.

In PSAVE mode, V

OUT is driven from a lower level to an

upper level by a switching burst. Once the upper level has

been reached, the switching is stopped and the quiescent

current is reduced. V

OUT falls from the upper to lower levels

in this low current state as the load current discharges

the output capacitor. The burst-to-off period in PSAVE will

decrease as the load current reduces.

The PSAVE switching burst frequency is controlled so that

the inductor current ripple is similar to that in PWM mode.

The minimum switching frequency during this period is

limited to 650kHz.

The SC196 automatically detects when to exit PSAVE

mode by monitoring V

OUT . For the SC196 to exit PSAVE

mode, the load must be increased, causing V

OUT to

decrease until the power save exit threshold is reached.

PSAVE levels are set high to minimize the undershoot

when exiting PSAVE. The lower PSAVE comparator level

is set +0.7% above V

OUT, and the upper comparator level

at +1.5% above V

OUT, with the exit threshold at -2% below

OUT.

If PSAVE operation is required, then a 22μF output

capacitor must be used.

Figure 1 — Power Save Operation

VOUT

0.7%

1.5%

PSAVE Mode at Light Load

PWM Mode at Medium/

High Load

-2%

BURST

OFF

Higher Load

Applied

0 A

Inductor Current

Time

100% Duty Cycle Operation

The 100% duty cycle mode may be selected by connecting

the MODE pin high. This will allow the SC196 to maintain

output regulation under conditions of low input voltage/

high output voltage conditions.

In 100% duty cycle operation, as the input supply drops

toward the output voltage, the PMOS on-time increases

linearly above the maximum value in ﬁxed-frequency

operation until the PMOS is active continuously. Once

Applications Information (Cont.)

www.semtech.com

SC196

PRELIMINARY

POWER MANAGEMENT

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