SC475A datasheet(13/27 Pages) SEMTECH

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SC475A

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POWER MANAGEMENT

VOUT

RTN

750mV

(FB threshold)

Final

VOUT

Initial

VOUT

Voltage overshoot

VOUT

Figure 8

The overshoot can be approximated by the following

equation, where ICL is the current limit, V

FINAL is the desired

setpoint for the ﬁnal voltage, L is in μH and COUT is in μF.

VMAX = √( ICL2 * L/COUT + V

FINAL

)

This overshoot can be eliminated by using a small RC

circuit to smooth the voltage seen at FB, see Figure 9.

The presence of Rs/Cs will prevent the rapid changes at

D0 from moving FB too quickly. The result is a gradual

change from VOUT

INITIAL to VOUTFINAL, to prevent the build-

up of high inductor current and reducing overshoot. Note

that Cs can be connected to either VOUT or GND. VOUT is

preferred because this results in higher ripple seen at the

FB pin, which improves stability.

RTN

750mV

(FB threshold)

Final

VOUT

Initial

VOUT

Figure 9

Note that Rs/Cs are part of the FB resistor divider and

therefore affect the output voltage sensing. To minimize

the effect of this, select Rs and Cs according to the

following guidelines:

The total of Rs + R3 should be chosen to give the correct

total resistance needed to adjust VOUT. Set Rs and R3 to

the same value.

Cs should be chosen to give a time constant equal to

approximately 18μsec for 325 kHz operation. Note that

Cs is charging through a resistive network composed

of Rs/R1/R2/R3. The effective resistance seen by Cs

is roughly equal to the parallel combination of Rs and

R3. For example, if the values for R1/R2/R3/Rs are

10k/50k/15k/15k, then the effective resistance would

be (10k + 15k) paralleled with 15k, which is 9.4k. To set

a time constant of 18μsec, CS should be approximately

18μsec/9.4k or 2000pF.

Applications Information (continued)

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