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SC2616MLTR датащи(PDF) 13 Page - Semtech Corporation

номер детали SC2616MLTR
подробное описание детали  Complete DDR Power Solution
PDF  16 Pages
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производитель  SEMTECH [Semtech Corporation]
домашняя страница  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC2616MLTR датащи(HTML) 13 Page - Semtech Corporation

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© 2003 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC2616
Applications Information (Cont.)
Guidelines for Layout of DDR Supply Using SC2616 DDR
Controllers on Typical Motherboards
Signals of arbitrary importance (signals that can be routed
last, such as SLP_S3, SLP_S5, 5VCC) have been omitted
for simplicity.
Parameters of importance in the Layout of the DDR power
section are as follows (in order of importance):
1. The VTT decoupling cap,C15, must be placed less than
0.25 inch from Controller.
2. The power rail decoupling cap,C4, must be placed
less than 0.25 inch from Q2 drain.
3. The decoupling caps for 5VSBY AND 12Vcc,C13 and
C8, must be placed very close to the controller(0.25inch
or less)
4. The VDDQ sense lines must be routed from a distant
load point (do not connect to the inductor output at the
VDDQ plane near the controller/FETS. Place the voltage
divider at the load point and route the divider center and
the sense ground close together as a differential pair.
Connect the AGND and the sensed ground and LGND at
the chip.
5. The VTTSNS must be connected to a distant load
point.
6. Adequate copper area must be allocated to both
VDDQ and VTT. The copper coverage must be uniform, i.
e. it provides low resistance to all areas around the
DIMMs. VDDQIN traces (and vias if used to carry current)
must be adequate for 2.0Amps.
7. Make the phase node area, which connects the
Inductor, Top FET and the Bottom FET, as small as
possible to prevent EMI, and ringing. Avoid making this
Evaluation Board Schematic
C13
1uF
0
R6
2R2
C12
R8
1k
5VSBY
5VCC
12VCC
Q1
0
U1
SC2616
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
FB
VTTSNS
LGND
5VSBY
VTT
VTT
VDDQSTBY
VDDQIN
5VCC
SLP_S5
SLP_S3
AGND
PGND
BG
TG
12VCC
COMP
SS/EN
0
C16
1n
C11
FB
R3
2R2
VTT
L1 3uH
Q2
5VCC
0
VDDQ
C9
SLP_S3
R9
2R2
R4
2R2
C14
R13
2.2R
0
C2
0
C17
1uF
C7
D1
0
FB
C10
C5
5VCC
VDDQ
0
0
C8
1uF
R2
43K
R1
2R2
C6
15n
C4
0
0
Q3
C1
C15
4.7uF
R5
1k
C3
R7
2R2
C18
1uF
12VCC
SLP_S5
0
C19



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