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HT48R062 датащи(PDF) 5 Page - Holtek Semiconductor Inc

номер детали HT48R062
подробное описание детали  Cost-Effective I/O Type 8-Bit MCU
PDF  31 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
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HT48R062 датащи(HTML) 5 Page - Holtek Semiconductor Inc

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HT48R062/HT48C062
Rev. 1.11
5
October 30, 2006
Program Memory
- ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data and table and is organized into 1024
´14 bits, ad-
dressed by the program counter and table pointer.
Certain locations in the program memory are reserved
for special usage:
· Location 000H
This area is reserved for the initialization program. Af-
ter chip reset, the program always begins execution at
location 000H.
· Table location
Any location in the EPROM space can be used as
look-up tables. The instructions
²TABRDC [m]² (the
current page, one page=256 words) and
²TABRDL
[m]
² (the last page) transfer the contents of the
lower-order byte to the specified data memory, and
the higher-order byte to TBLH (08H). Only the desti-
nation of the lower-order byte in the table is
well-defined, the other bits of the table word are trans-
ferred to the lower portion of TBLH, the remaining 2
bits are read as
²0². The Table Higher-order byte reg-
ister (TBLH) is read only. The table pointer (TBLP) is a
read/write register (07H), where P indicates the table
location. Before accessing the table, the location must
be placed in TBLP. The TBLH is read only and cannot
be restored. All table related instructions need 2 cy-
cles to complete the operation. These areas may
function as normal program memory depending upon
the requirements.
Stack Register
- STACK
This is a special part of the memory used to save the
contents of the Program Counter only. The stack is orga-
nized into one level and is neither part of the data nor
part of the program space, and is neither readable nor
writeable. The activated level is indexed by the stack
pointer (SP) and is neither readable nor writeable. At a
subroutine call the contents of the program counter are
pushed onto the stack. At the end of a subroutine sig-
naled by a return instruction (RET), the program counter
is restored to its previous value from the stack. After a
chip reset, the SP will point to the top of the stack.
If the stack is full and a
²CALL² is subsequently exe-
cuted, stack overflow occurs and the first entry will be
lost (only the most recent return address is stored).
Data Memory
- RAM
The data memory is designed with 44
´8 bits. The data
memory is divided into two functional groups: special
function registers and general purpose data memory
(32
´8). Most of them are read/write, but some are read
only.
The special function registers include the Indirect Ad-
dressing Register (00H), the Memory Pointer register
(MP;01H), the Accumulator (ACC;05H) the Program
Counter Lower-order byte register (PCL;06H), the Table
Pointer (TBLP;07H), the table higher-order byte register
(TBLH;08H), the Watchdog Timer option setting register
(WDTS;09H), the STATUS register (STATUS;0AH), the
I/O registers (PA;12H, PB;14H) and I/O control registers
(PAC;13H, PBC;15H). The remaining space before the
20H is reserved for future expanded usage and reading
these locations will return the result 00H. The general
purpose data memory, addressed from 20H to 3FH, is
used for data and control information under instruction
command.
All data memory areas can handle arithmetic, logic, in-
crement, decrement and rotate operations directly. Ex-
cept for some dedicated bits, each bit in the data
memory can be set and reset by the
²SET [m].i² and
²CLR [m].i² instructions, respectively. They are also indi-
rectly accessible through memory pointer register
(MP;01H).
0 0 0 H
D e v i c e i n i t i a l i z a t i o n p r o g r a m
P r o g r a m
1 4 b i t s
L o o k - u p t a b l e ( 2 5 6 w o r d s )
n 0 0 H
L o o k - u p t a b l e ( 2 5 6 w o r d s )
3 F F H
N o t e : n r a n g e s f r o m 0 t o 3
n F F H
Program Memory
Instruction(s)
Table Location
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table Location
Note:
*9~*0: Table location bits
@7~@0: Table pointer bits
P9~P8: Current program counter bits



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