SC4602AEVB datasheet(12/18 Pages) SEMTECH

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SC4602A/B

POWER MANAGEMENT

For the top MOSFET, its total power loss includes its con-

duction loss, switching loss, gate charge loss, output ca-

pacitance loss and the loss related to the reverse recov-

ery of the bottom diode, shown as follows:

OSS

GATE

PEAK

TOP

RMS

TOP

TOTAL

TOP

)

(

)

(

⋅

Where:

G = gate drive resistor,

GD = the gate to drain charge of the top MOSFET,

GS2 = the gate to source charge of the top MOSFET,

GT = the total gate charge of the top MOSFET,

OSS = the output charge of the top MOSFET and

rr = the reverse recovery charge of the bottom diode.

For the top MOSFET, it experiences high current and high

voltage overlap during each on/off transition. But for the

bottom MOSFET, its switching voltage is the bottom

diode’s forward drop during its on/off transition. So the

switching loss for the bottom MOSFET is negligible. Its

total power loss can be determined by:

AVG

GATE

BOT

RMS

BOT

TOTAL

BOT

⋅

Where:

GB = the total gate charge of the bottom MOSFET and

F = the forward voltage drop of the bottom diode.

For a low voltage and high output current application such

as the 3.3V/1.5V@6A case, the conduction loss is often

dominant and selecting low R

DS(ON) MOSFETs will notice-

ably improve the efficiency of the converter even though

they give higher switching losses.

The gate charge loss portion of the top/bottom MOSFET’s

total power loss is derived from the SC4602A/B. This

gate charge loss is based on certain operating conditions

s, VGATE, and IO).

The thermal estimations have to be done for both

MOSFETs to make sure that their junction temperatures

do not exceed their thermal ratings according to their

total power losses P

TOTAL, ambient temperature Ta and their

thermal resistances R

ja as follows:

TOTAL

(max)

Applications Information (Cont.)

Loop Compensation Design

For a DC/DC converter, it is usually required that the

converter has a loop gain of a high cross-over frequency

for fast load response, high DC and low frequency gain

for low steady state error, and enough phase margin for

its operating stability. Often one can not have all these

properties at the same time. The purpose of the loop

compensation is to arrange the poles and zeros of the

compensation network to meet the requirements for a

specific application.

The SC4602A/B has an internal error amplifier and re-

quires the compensation network to connect among the

COMP pin and VSENSE pin, GND, and the output as

shown in Figure 3. The compensation network includes

C1, C2, R1, R7, R8 and C9.

R9 is used to program the output voltage according to:

)

(

⋅

SC4602A/B

VCC

SYNC/SLEEP

COMP

VSENSE

PHASE

GND

NDRV

PDRV

SC4602A/B

VCC

SYNC/SLEEP

COMP

VSENSE

PHASE

GND

NDRV

PDRV

Figure 3. Compensation network provides 3

poles and 2 zeros.

For voltage mode step down applications as shown in

Figure 3, the power stage transfer function is:

)

(

⋅

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