Block Diagram

TE Trigger

HT12E

DATA Trigger

HT12A

Note:

The address data pins are available in various combinations (refer to the address/data table).

Pin Assignment

HT12A/HT12E

Rev. 1.10

2

January 24, 2003

O s c i l l a t o r

¸ 3 D i v i d e r

O S C 1

O S C 2

V D D

V S S

1 2 T r a n s m i s s i o n

G a t e C i r c u i t

¸ 1 2 C o u n t e r &

1 o f 1 2 D e c o d e r

B i n a r y D e t e c t o r

T E

A 0

A 7

D O U T

D a t a S e l e c t

& B u f f e r

S y n c .

C i r c u i t

A D 8

A D 1 1

O s c i l l a t o r

¸ 5 7 6 D i v i d e r

V D D

V S S

1 2 T r a n s m i s s i o n

G a t e C i r c u i t

¸ 1 2 C o u n t e r &

1 o f 1 2 D e c o d e r

B i n a r y D e t e c t o r

D O U T

D a t a S e l e c t

& B u f f e r

S y n c .

C i r c u i t

L / M B

X 2

X 1

A 0

A 7

D 8

D 1 1

8 - A d d r e s s

4 - D a t a

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

V D D

D O U T

X 1

X 2

L / M

D 1 1

D 1 0

D 9

D 8

1

2

3

4

5

6

7

8

9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

8 - A d d r e s s

4 - D a t a

1

2

3

4

5

6

7

8

9

1 0

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

N C

V D D

D O U T

X 1

X 2

L / M

D 1 1

D 1 0

D 9

D 8

N C

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

H T 1 2 A

1 8 D I P - A

H T 1 2 A

2 0 S O P - A

8 - A d d r e s s

4 - A d d r e s s / D a t a

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

V D D

D O U T

O S C 1

O S C 2

T E

A D 1 1

A D 1 0

A D 9

A D 8

1

2

3

4

5

6

7

8

9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

H T 1 2 E

1 8 D I P - A

8 - A d d r e s s

4 - A d d r e s s / D a t a

1

2

3

4

5

6

7

8

9

1 0

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

N C

V D D

D O U T

O S C 1

O S C 2

T E

A D 1 1

A D 1 0

A D 9

A D 8

N C

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

H T 1 2 E

2 0 S O P - A