 2001 OSRAM Opto Semiconductors Inc.• San Jose, CA

PD2535/6/7, PD3535/6/7, PD4435/6/7

www.infineon.com/opto • 408-456-4000

OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany

www.osram-os.com • +49-941-202-7178

5

July 5, 2001-14

DC Characteristics at 25

°C

Note:

Pin Assignments and Definitions

Parameter

Limits

Conditions

Min.

Typ.

Max.

Units

4.5

5.0

5.5

Volts

Nominal

—

2.5

3.5

mA

PD243X

PD353X

PD443X

—

115

145

150

130

165

170

mA

mA

mA

—

—

0.8

Volts

2.0

—

—

Volts

(1)

25

—

100

µA

—

—

0.4

Volts

2.4

—

—

Volts

–8.9

—

—

mA

1.6

—

—

mA

Data I/O Bus Loading

—

—

100

pF

—

Clock I/O Bus Loading

—

—

240

pF

—

Pin

Function

Definition

1RD

Active low, will enable a processor to

read all registers in the display.

2

CLK I/O

If CLK SEL (pin 3) is low, then expect

an external clock source into this pin.

If CLK SEL is high, then this pin will

be the master or source into this pin.

If CLK SEL is high, then this pin will

be the master or source for all other

devices which have CLK SEL low.

3

CLKSEL

CLOCK SELECT determines the

action of pin 2. CLK I/O, see the sec-

tion on Cascading for an example.

4

RST

Reset. Used to synchronize blinking.

Will not clear the display. The reset

pulse should be less than 1 ms

5

CE1

Chip enable (active high).

6

CE0

Chip enable (active low).

7

A2

Address input (MSB).

8

A1

Address input.

9

A0

Address input (LSB).

10

GND

Ground.

Pin Assignments and Definitions (continued)

Pin

Function

Definition

11

WR

Write. Active low. If the device is

selected, a low on the write input

loads the data into memory.

12

D7

Data Bus bit 7 (MSB).

13

D6

Data Bus bit 6.

14

D5

Data Bus bit 5.

15

D4

Data Bus bit 4.

16

D3

Data Bus bit 3.

17

D2

Data Bus bit 2.

18

D1

Data Bus bit 1.

19

D0

Data Bus bit 0 (LSB).

20

Positive power pin.