AD8312

Data Sheet

Rev. B | Page 16 of 20

5

–5

–4

–3

–2

–1

0

1

2

3

4

–60

–50

–40

–30

–20

–10

0

10

64 QAM

INPUT (dBm)

CW

IS-95 REV

WCDMA 64-CH

Figure 29. Shift in Transfer Function due to

Several Different Signal Waveforms

Temperature Drift

Figure 30 shows the logarithmic slope and error over temperature

for a 0.9 GHz input signal. Error due to drift over temperature

consistently remains within ±0.5 dB and only begins to exceed this

limit when the ambient temperature goes above 70°C. For all

frequencies using a reduced temperature range, higher meas-

urement accuracy is achievable.

1.3

1.0

0.8

0.5

0.3

0

2.5

–2.5

–2.0

–1.5

–1.0

–0.5

0

0.5

1.0

1.5

2.0

–60

–50

–40

–30

–20

–10

0

10

PIN (dBm)

+85°C

+70°C

+25°C

0°C

–10°C

–20°C

–40°C

Figure 30. Typical Drift at 900 MHz for Various Temperatures

Operation Above 2.5 GHz

The AD8312 works at high frequencies, but exhibits slightly

higher output voltage temperature drift. Figure 31 and Figure 32

show the transfer functions and error distributions of a large

population of devices at 3.0 GHz and 3.5 GHz over temperature.

Due to the repeatability of the drift from device to device, comp-

ensation can be applied to reduce the effects of temperature drift.

In the case of the 3.5 GHz distribution, an intercept correction

of 2.0 dB at 85°C would improve the accuracy of the distribution

to ±2 dB over a +40 dB range.

1.0

0.8

0.6

0.4

0.2

0.9

0.7

0.5

0.3

0.1

0

5

–5

–4

–3

–2

–1

0

1

2

3

4

–55

–45

–35

–25

–15

–5

5

PIN (dBm)

+85°C

+25°C

–40°C

Figure 31.Output Voltage and Error at −40°C, +25°C, and +85°C after

Ambient Normalization vs. Input Amplitude at 3.0 GHz for 60 Devices

1.0

0.8

0.6

0.4

0.2

0.9

0.7

0.5

0.3

0.1

0

5

–5

–4

–3

–2

–1

0

1

2

3

4

–55

–45

–35

–25

–15

–5

5

PIN (dBm)

+85°C

+25°C

–40°C

Figure 32. Output Voltage and Error at −40°C, +25°C, and +85°C after

Ambient Normalization vs. Input Amplitude at 3.5 GHz for 30 Devices

Device Handling

The wafer level chip scale package consists of solder bumps

connected to the active side of the die. The device is lead free with

95.5% tin, 4.0% silver, and 0.5% copper solder bump composition.

The WLCSP package can mount on printed circuit boards using

standard surface-mount assembly techniques. However, take

caution to avoid damaging the die. See the AN-617 application

note, Wafer Level Chip Scale Package, for additional information.

WLCSP devices are bumped die; exposed die can be sensitive to

light conditions, which can influence specified limits.

Evaluation Board

Figure 33 shows the schematic of the AD8312 evaluation board.

The layout and silkscreen of the component and circuit sides are

shown in Figure 34 to Figure 37. The board is powered by a

single supply in the 2.7 V to 5.5 V range. The power supply is

decoupled by a single 0.1 µF capacitor. Table 6 details the

various configuration options of the evaluation board.