93LC76/86

TABLE 1-3:

AC CHARACTERISTICS

Applicable over recommended operating ranges shown below unless otherwise noted:

VCC = +2.5V to +6.0V

Commercial (C): TAMB = 0°C to +70°C

Industrial (I):

TAMB = -40°C to +85°C

Parameter

Symbol

Min.

Max.

Units

Conditions

Clock frequency

FCLK

—

3

2

MHz

MHz

4.5V

≤ VCC ≤ 6.0V

2.5V

≤ VCC < 4.5V

Clock high time

TCKH

200

300

—

ns

ns

4.5V

≤ VCC ≤ 6.0V

2.5V

≤ VCC < 4.5V

Clock low time

TCKL

100

200

—

ns

ns

4.5V

≥ VCC ≤ 6.0V

2.5V

≤ VCC < 4.5V

Chip select setup time

TCSS

50

100

—

ns

ns

4.5V

≤ VCC ≤ 6.0V, Relative to CLK

2.5V

≤ VCC < 4.5V, Relative to CLK

Chip select hold time

TCSH

0

—

ns

—

Chip select low time

TCSL

250

—

ns

Relative to CLK

Data input setup time

TDIS

50

100

—

ns

ns

4.5V

≤ VCC ≤ 6.0V, Relative to CLK

2.5V

≤ VCC <4.5V, Relative to CLK

Data input hold time

TDIH

50

100

—

ns

ns

4.5V

≤ VCC ≤ 6.0V, Relative to CLK

2.5V

≤ VCC < 4.5V, Relative to CLK

Data output delay time

TPD

—

100

250

ns

ns

4.5V

≤ VCC ≤ 6.0V, CL = 100 pF

2.5V

≤ VCC < 4.5V, CL = 100 pF

Data output disable time

TCZ

—

100

500

ns

ns

4.5V

≤ VCC ≤ 6.0V

2.5V

≤ VCC < 4.5V (Note 1)

Status valid time

TSV

—

200

300

ns

ns

4.5V

≥ VCC ≤ 6.0V, CL = 100 pF

2.5V

≤ VCC <4.5V, CL = 100 pF

Program cycle time

TWC

—

5

ms

ERASE/WRITE mode

TEC

—

15

ms

ERAL mode

TWL

—

30

ms

WRAL mode

Endurance

—

1M

—

cycles

25°C, Vcc = 5.0V, Block Mode

(Note 2)

Note 1: This parameter is periodically sampled and not 100% tested.

2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific applica-

tion, please consult the Total Endurance Model which can be found on our website.