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PREBIAS STARTUP CAPABILITY

t − Time − 5 ms/div

Startup

Period

UVLO Threshold

PTH12030W/L

SLTS211F – MAY 2003 – REVISED FEBRUARY 2007

1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module

regulates at its adjusted set-point voltage.

2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp

speeds of up to 1 V/ms.

3. The absolute maximum voltage that may be applied to the Track pin is the input voltage V

4. The module cannot follow a voltage at its track control input until it has completed its soft-start

initialization. This takes about 40 ms from the time that a valid voltage has been applied to its input.

During this period, it is recommended that the Track pin be held at ground potential.

5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (V

Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has

been applied.

The capability to start up into an output prebias condition is now available to all the 12-V input, PTH series of

A prebias startup condition occurs as a result of an external voltage being present at the output of a power

module prior to its output becoming active. This often occurs in complex digital systems when current from

another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another

path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A

prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under

most operating conditions, such modules can sink as well as source output current. The 12-V input PTH

modules all incorporate synchronous rectifiers, but will not sink current during startup, or whenever the Inhibit pin

is held low. Startup includes an initial delay (approximately 8 ms–15 ms), followed by the rise of the output

voltage under the control of the module’s internal soft-start mechanism; see Figure 17.

Figure 17. Startup Waveforms

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