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TUSB564 датащи(PDF) 38 Page - Texas Instruments |
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TUSB564 датащи(HTML) 38 Page - Texas Instruments |
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38 / 52 page ![]() 8.4 Power Supply Recommendations The TUSB564-Q1 is designed to operate with a 3.3V power supply. Do not use levels above those listed in Recommended Operating Conditions. If using a higher voltage system power supply, a voltage regulator can be used to step down to 3.3V. Use decoupling capacitors to reduce noise and improve power supply integrity. Connect a 0.1µF capacitor between each power pin and ground. 8.5 Layout 8.5.1 Layout Guidelines 1. Route RXP/N and TXP/N pairs with controlled 90Ω differential impedance (±15%). 2. Keep away from other high speed signals. 3. Keep intra-pair routing to within 2 mils. 4. Place length matching near the location of mismatch. 5. Separate each pair by at least 3 times the signal trace width. 6. Keep the use of bends in differential traces to a minimum. When bends are used, make sure to keep the number of left and right bends as equal as possible and the angle of the bend ≥ 135 degrees. This minimizes any length mismatch causes by the bends and therefore minimizes the impact bends have on EMI. 7. Route all differential pairs on the same of layer. 8. Keep the number of vias to a minimum. TI recommends to keep the via count to 2 or less. 9. Keep traces on layers adjacent to ground plane. 10. Do NOT route differential pairs over any plane split. 11. Note that adding test points can cause impedance discontinuity, and therefore negatively impact signal performance. If test points are used, place the points in series and symmetrically. The points must not be placed in a manner that causes a stub on the differential pair. TUSB564-Q1 SLLSFO9A – MAY 2024 – REVISED SEPTEMBER 2024 www.ti.com 38 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TUSB564-Q1 |
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