LC87F5LP6A

No.A0664-18/28

2. SIO1 Serial I/O Characteristics (Note 4-2-1)

Specification

Parameter

Symbol

Pins/

Remarks

Conditions

VDD[V]

min

typ

max

unit

Frequency

Tsck(3)

2

Low level

pulse width

tSCKL(3)

1

High level

pulse width

tSCKH(3)

SCK1(P15)

• See Fig. 6.

2.5 to 5.5

1

Frequency

tSCK(4)

2

tCYC

Low level

pulse width

tSCKL(4)

1/2

High level

pulse width

tSCKH(4)

SCK1(P15)

• CMOS output selected.

• See Fig. 6.

2.5 to 5.5

1/2

tSCK

Data setup time

tsDI(2)

0.03

Data hold time

thDI(2)

SI1(P14),

SB1(P14)

• Must be specified with respect to

rising edge of SIOCLK

• See fig. 6.

2.5 to 5.5

0.03

Output delay

time

tdD0(4)

SO1(P13),

SB1(P14)

• Must be specified with respect to

falling edge of SIOCLK

• Must be specified as the time to

the beginning of output state

change in open drain output mode.

• See Fig. 6.

2.5 to 5.5

(1/3)tCYC

+0.05

µs

Note 4-2-1: These specifications are theoretical values. Add margin depending on its use.