PCA9675DB datasheet(10/34 Pages) PHILIPS

10 / 34 page

PCA9675_1

Product data sheet

Rev. 01 — 1 February 2007

10 of 34

NXP Semiconductors

PCA9675

Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt

The I2C-bus master must interpret a non-acknowledge from the PCA9675 (at any time) as

a ‘Software Reset Abort’. The PCA9675 does not initiate a reset of its registers.

The unique sequence that initiates a Software Reset is described in Figure 12.

7.2.2 Device ID (PCA9675 ID ﬁeld)

The Device ID ﬁeld is a 3-byte read-only (24 bits) word giving the following information:

• 8 bits with the manufacturer name, unique per manufacturer (for example,

NXP Semiconductors).

• 13 bits with the part identiﬁcation, assigned by manufacturer, the 7 MSBs with the

category ID and the 6 LSBs with the feature ID (for example, PCA9675 16-bit

quasi-output I/O expander).

• 3 bits with the die revision, assigned by manufacturer (for example, Rev X).

The Device ID is read-only, hard wired in the device and can be accessed as follows:

1. START command

2. The master sends the Reserved Device ID I2C-bus address ‘1111 100’ with the R/W

bit set to 0 (write).

3. The master sends the I2C-bus slave address of the slave device it needs to identify.

The LSB is a ‘Don’t care’ value. Only one device must acknowledge this byte (the one

that has the I2C-bus slave address).

4. The master sends a Re-START command.

Remark: A STOP command followed by a START command will reset the slave state

machine and the Device ID read cannot be performed.

Remark: A STOP command or a Re-START command followed by an access to

another slave device will reset the slave state machine and the Device ID read cannot

be performed.

5. The master sends the Reserved Device ID I2C-bus address ‘1111 100’ with the R/W

bit set to 1 (read).

6. The device ID read can be done, starting with the 8 manufacturer bits (ﬁrst byte +

4 MSB of the second byte), followed by the 13 part identiﬁcation bits and then the 3

die revision bits (3 LSB of the third byte).

7. The master ends the reading sequence by NACKing the last byte, thus resetting the

slave device state machine and allowing the master to send the STOP command.

Fig 12. Software Reset sequence

002aac156

SWRST Call I2C address

START condition

R/W

acknowledge

from slave(s)

SWRST data = 06h

acknowledge

from slave(s)

PCA9675 is(are) reset.

Registers are set to default power-up values.

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