SC183CQ datasheet(16/20 Pages) SEMTECH

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SC183CQ

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OSC

DROOP

LOAD

OUT

⋅

∆

⋅

= 3

(4)

The output capacitor RMS current ripple may be calcu-

lated from Equation 5.

(

)













⋅

−

⋅

OSC

OUT

MAX

OUT

RMS

COUT

)

(

)

(

(5)

Table 3 lists the manufacturers of recommended output

capacitor options.

IN Selection

The SC183CQ source input current is a DC supply current

with a triangular ripple imposed on it. To prevent large

input voltage ripple, a low ESR ceramic capacitor is

required. A minimum value of 4.7μF should be used. It is

important to consider the DC voltage coefficient charac-

teristics when determining the actual required value. It

should be noted that a 10mF, 6.3V, X5R ceramic capacitor

with 5V DC applied may exhibit a capacitance as low as

4.5mF. To estimate the required input capacitor, determine

the

acceptable input ripple voltage and calculate the

minimum value required for C

IN from Equation 6.

OSC

OUT

ESR

⋅













−

∆













−

(6)

The input capacitor RMS ripple current varies with the

input and output voltage. The maximum input capacitor

RMS current is found from Equation 7.













−

OUT

RMS

CIN

)

(

(7)

The input voltage ripple and RMS current ripple are at a

maximum when the input voltage is twice the output

voltage or 50% duty cycle.

The input capacitor provides a low impedance loop for

the edges of pulsed current drawn by the PMOS switch.

Low ESR/ESL X5R ceramic capacitors are recommended

for this function. To minimise stray inductance, the capaci-

Applications Information (continued)

tor should be placed as closely as possible to the PVIN and

PGND pins of the SC183CQ.

Manufacturer

Part Nunber

Value

(μF)

Type

Rated

Voltage

(VDC)

Value

3.3V

(μF)

Dimensions

LxWxH

(mm)

Murata

GRM21BR60J106K

10±10%

X5R

6.3

4.74

2.0x1.25x1.25

(EIA:0805)

Murata

GRM219R60J106K

10±10%

X5R

6.3

4.05

2.0x1.25x0.85

(EIA:0805)

Murata

GRM21BR60J226M

22±20%

X5R

6.3

6.57

2.0x1.25x1.25

(EIA:0805)

Murata

GRM31CR60J476M

47±20%

X5R

6.3

20.3

3.2x1.6x1.6

(EIA:1206)

Table 3 – Recommended Capacitors

Temperature Derating

The SC183CQ may require derating when operating at

higher ambient temperatures. Figure 3 shows typical load

current derating versus ambient temperature for the

SC183CQ which can operate in ambient temperatures up

to 105°C.

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

100

105

Ambient Temperature (°C)

Load Current vs Ambient Temperature

J A = 40°C/W

VIN= 3.3V

VOUT up to 2.5V

VIN= 5V

VOUT up to 3.3V

Figure 3 — Load Current Derating vs Temperature

The derating in Figure 3 is applicable for systems in which

the device thermal resistance (junction to ambient) is

40°C/W. Systems with higher thermal resistance may

require stronger derating while systems with lower

thermal resistance may allow less derating. The thermal

resistance of the system should limit the maximum junc-

tion temperature to 125°C.

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