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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PM73121 датащи(PDF) 44 Page - PMC-Sierra, Inc |
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PM73121 датащи(HTML) 44 Page - PMC-Sierra, Inc |
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44 / 223 page  PM73121 AAL1gator II PMC-Sierra, Inc. PMC-980620 ,VVXH AAL1 SAR Processor Data Sheet QSPQSD@U6S`Ã6I9Ã8PIAD9@IUD6GÃUPÃQH8TD@SS6ÃDI8Ã6I9ÃAPSÃDUTÃ8VTUPH@ST¶ÃDIU@SI6GÃVT@ Unstructured data is received without regard to the byte alignment of data within a frame and is placed in the frame buffer in the order in which it arrives. Figure 13 shows the basic components of the TFTC. The receive line interface is primarily a serial-to-parallel converter. Serial data, which is derived from the RL_SER pin, is supplied to a shift register. The shift register clock is the RL_CLK input from the external framer. When the data has been properly shifted in, it is transferred to a 2-byte holding register by an internally derived channel clock. This clock is derived from the line clock and the framing information. The channel clock also informs the line-to-memory interface that two data bytes are available from the line. When the two bytes are available, a line attention signal is sent to the line encoder block. However, because the channel clock is an asynchronous input to the line-to-memory inter- face, it is passed through a synchronizer before it is supplied to the line encoder. Since there are eight potential lines and each of them provides its own channel clock, they are synchronized before being submitted to the line encoder. The TFTC accommodates the T1 Super Frame (SF) mode by treating it like the Extended Super Frame (ESF) format. The TFTC ignores every other frame pulse and captures signaling data only on the last frame of odd SF multiframes. The formatting of data in the signaling buffers is highly dependent on the operating mode. Refer to section 7.6.6 “RESERVED (Transmit Signaling Buffer)” on page 132 for more information on the transmit signaling buffer. Figure 13. Transmit Frame Transfer Controller External Framer External Framer Receive Line Interface Receive Line Interface Line Encoder Line-to-Memory Interface Line Number Channel Pair Number Data 16 16 3 4 16 Line 0 Line 0 Line 7 Line 7 • • • • • • ATTN0 ATTN7 DATA0 DATA7 ANY |
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