7 / 64 page
ISD-200 ASIC Datasheet
In-System Design Confidential
v
Table of Figures
Figure 1 – Pin Layout ..................................................................................................................................... 7
Figure 2 – ATA Reset Protocol .................................................................................................................... 28
Figure 3 – Full Device Initialization Sequence ............................................................................................30
Figure 4 – ATA Command Block Flow Diagram ........................................................................................ 34
Figure 5 – Configuration Sequence .............................................................................................................. 41
Figure 6 – External Components Connection............................................................................................... 44
Figure 7 – IORDY Hookup .......................................................................................................................... 44
Figure 8 – I
2C Memory Device Interface Timing......................................................................................... 46
Figure 9 – Package Outline Diagram............................................................................................................ 48
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
