PIC18F23K20-ESLASHP datasheet(38/420 Pages) MICROCHIP

38 / 420 page

PIC18F2XK20/4XK20

DS41303B-page 36

Advance Information

2.10.2

TWO-SPEED START-UP

SEQUENCE

Wake-up from Power-on Reset or Sleep.

Instructions begin executing by the internal

oscillator at the frequency set in the IRCF<2:0>

bits of the OSCCON register.

OST enabled to count 1024 external clock

cycles.

OST timed out. External clock is ready.

OSTS is set.

Clock switch finishes according to FIGURE 2-7:

“Clock Switch Timing”

2.10.3

CHECKING TWO-SPEED CLOCK

STATUS

Checking the state of the OSTS bit of the OSCCON

from the external clock source, as defined by the

FOSC<2:0> bits in CONFIG1H Configuration register,

or the internal oscillator. OSTS = 0 when the external

oscillator is not ready, which indicates that the system

is running from the internal oscillator.

2.10.4

CLOCK SWITCH TIMING

When switching between one oscillator and another,

the new oscillator may not be operating which saves

power (see Figure 2-7). If this is the case, there is a

delay after the IRCF<2:0> bits of the OSCCON register

are modified before the frequency change takes place.

The OSTS and IOFS bits of the OSCCON register will

reflect the current active status of the external and

HFINTOSC oscillators. The timing of a frequency

selection is as follows:

IRCF<2:0> bits of the OSCCON register are

modified.

The old clock continues to operate until the new

clock is ready.

Clock switch circuitry waits for two consecutive

rising edges of the old clock after the new clock

ready signal goes true.

The system clock is held low starting at the next

falling edge of the old clock.

Clock switch circuitry waits for an additional two

rising edges of the new clock.

On the next falling edge of the new clock the low

hold on the system clock is released and new

clock is switched in as the system clock.

Clock switch is complete.

See Figure 2-1 for more details.

If the HFINTOSC is the source of both the old and new

frequency, there is no start-up delay before the new

frequency is active. This is because the old and new

frequencies are derived from the HFINTOSC via the

postscaler and multiplexer.

Start-up

delay

specifications

are

located

Section 26.0 “Electrical Characteristics”, under AC

Specifications (Oscillator Module).

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