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ENC28J60T-C/SS датащи(PDF) 28 Page - Microchip Technology |
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ENC28J60T-C/SS датащи(HTML) 28 Page - Microchip Technology |
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28 / 96 page ![]() ENC28J60 DS39662B-page 26 Preliminary © 2006 Microchip Technology Inc. 4.2 SPI Instruction Set The operation of the ENC28J60 depends entirely on commands given by an external host controller over the SPI interface. These commands take the form of instructions, of one or more bytes, which are used to access the control memory and Ethernet buffer spaces. At the least, instructions consist of a 3-bit opcode, followed by a 5-bit argument that specifies either a register address or a data constant. Write and bit field instructions are also followed by one or more bytes of data. A total of seven instructions are implemented on the ENC28J60. Table 4-1 shows the command codes for all operations. TABLE 4-1: SPI INSTRUCTION SET FOR THE ENC28J60 Instruction Name and Mnemonic Byte 0 Byte 1 and Following Opcode Argument Data Read Control Register (RCR) 00 0aaa aa N/A Read Buffer Memory (RBM) 00 1110 10 N/A Write Control Register (WCR) 01 0aaa aa d d d d d d d d Write Buffer Memory (WBM) 01 1110 10 d d d d d d d d Bit Field Set (BFS) 10 0aaa aa d d d d d d d d Bit Field Clear (BFC) 10 1aaa aa d d d d d d d d System Reset Command (Soft Reset) (SRC) 11 1111 11 N/A Legend: a = control register address, d = data payload. |
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