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TDA9840 датащи(PDF) 19 Page - NXP Semiconductors |
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TDA9840 датащи(HTML) 19 Page - NXP Semiconductors |
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19 / 28 page ![]() 1998 Jul 03 19 Philips Semiconductors Product specification TV and VTR stereo/dual sound processor with digital identification and I2C-bus control TDA9840 Table 11 Data byte to select stereo adjustment [subaddress (03)HEX] ∆G V (dB) DATA D7 D6 D5 D4 D3 D2 D1 D0 HEX +2.5 0 0 1 1 1 0 0 1 39 +2.4 0 0 1 1 1 0 0 0 38 +2.3 0 0 1 1 0 1 1 1 37 +2.2 0 0 1 1 0 1 1 0 36 +2.1 0 0 1 1 0 1 0 1 35 +2.0 0 0 1 1 0 1 0 0 34 +1.9 0 0 1 1 0 0 1 1 33 +1.8 0 0 1 1 0 0 1 0 32 +1.7 0 0 1 1 0 0 0 1 31 +1.6 0 0 1 1 0 0 0 0 30 +1.5 0 0 1 0 1 1 1 1 2F +1.4 0 0 1 0 1 1 1 0 2E +1.3 0 0 1 0 1 1 0 1 2D +1.2 0 0 1 0 1 1 0 0 2C +1.1 0 0 1 0 1 0 1 1 2B +1.0 0 0 1 0 1 0 1 0 2A +0.9 0 0 1 0 1 0 0 1 29 +0.8 0 0 1 0 1 0 0 0 28 +0.7 0 0 1 0 0 1 1 1 27 +0.6 0 0 1 0 0 1 1 0 26 +0.5 0 0 1 0 0 1 0 1 25 +0.4 0 0 1 0 0 1 0 0 24 +0.3 0 0 1 0 0 0 1 1 23 +0.2 0 0 1 0 0 0 1 0 22 +0.1 0 0 1 0 0 0 0 1 21 0 0 0000000 00 −0.1 00000001 01 −0.2 00000010 02 −0.3 00000011 03 −0.4 00000100 04 −0.5 00000101 05 −0.6 00000110 06 −0.7 00000111 07 −0.8 00001000 08 −0.9 00001001 09 −1.0 00001010 0A −1.1 00001011 0B −1.2 00001100 0C −1.3 00001101 0D −1.4 00001110 0E −1.5 00001111 0F −1.6 00010000 10 −1.7 00010001 11 −1.8 00010010 12 −1.9 00010011 13 −2.0 00010100 14 −2.1 00010101 15 −2.2 00010110 16 −2.3 00010111 17 −2.4 00011000 18 ∆G V (dB) DATA D7 D6 D5 D4 D3 D2 D1 D0 HEX Table 12 Data byte to select integration time [subaddress (04)HEX] Function of the bits: • INTFU = 0 integrator function enabled • INTFU = 1 integrator function disabled • INT1SN = 0 integration time approximately 1 s (default) • INT1SN = 1integration time approximately 0.5 s. FUNCTION SUBADDRESS DATA D7 D6 D5 D4 D3 D2 D1 D0 Test byte 0000 0100 XXXXXX INTFU INT1SN |
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