DSPIC33FJ12MC02ESS datasheet(204/284 Pages) MICROCHIP

204 / 284 page

dsPIC33FJ12MC201/202

DS70265B-page 202

Preliminary

AD1CON1: ADC1 CONTROL REGISTER 1

R/W-0

U-0

R/W-0

U-0

R/W-0

ADON

—ADSIDL

—

—AD12B

FORM<1:0>

bit 15

bit 8

R/W-0

U-0

R/W-0

HC,HS

R/C-0

HC, HS

SSRC<2:0>

—

SIMSAM

ASAM

SAMP

DONE

bit 7

bit 0

Legend:

HC = Cleared by hardware

HS = Set by hardware

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

ADON: ADC Operating Mode bit

1 = ADC module is operating

0 =ADC is off

bit 14

Unimplemented: Read as ‘0’

bit 13

ADSIDL: Stop in Idle Mode bit

1 = Discontinue module operation when device enters Idle mode

0 = Continue module operation in Idle mode

bit 12-11

Unimplemented: Read as ‘0’

bit 10

AD12B: 10-bit or 12-bit Operation Mode bit

1 = 12-bit, 1-channel ADC operation

0 = 10-bit, 4-channel ADC operation

bit 9-8

FORM<1:0>: Data Output Format bits

For 10-bit operation:

11 = Signed fractional (DOUT = sddd dddd dd00 0000, where s = .NOT.d<9>)

10 = Fractional (DOUT = dddd dddd dd00 0000)

01 = Signed integer (DOUT = ssss sssd dddd dddd, where s = .NOT.d<9>)

00 = Integer (DOUT = 0000 00dd dddd dddd)

For 12-bit operation:

11 = Signed fractional (DOUT = sddd dddd dddd 0000, where s = .NOT.d<11>)

10 = Fractional (DOUT = dddd dddd dddd 0000)

01 = Signed Integer (DOUT = ssss sddd dddd dddd, where s = .NOT.d<11>)

00 = Integer (DOUT = 0000 dddd dddd dddd)

bit 7-5

SSRC<2:0>: Sample Clock Source Select bits

111 = Internal counter ends sampling and starts conversion (auto-convert)

110 = Reserved

101 = Motor Control PWM2 interval ends sampling and starts conversion

100 = Reserved

011 = Motor Control PWM1 interval ends sampling and starts conversion

010 = GP timer 3 compare ends sampling and starts conversion

001 = Active transition on INT0 pin ends sampling and starts conversion

000 = Clearing sample bit ends sampling and starts conversion

bit 4

Unimplemented: Read as ‘0’

bit 3

SIMSAM: Simultaneous Sample Select bit (applicable only when CHPS<1:0> = 01 or 1x)

When AD12B = 1, SIMSAM is: U-0, Unimplemented, Read as ‘0’

1 = Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS<1:0> = 1x); or

Samples CH0 and CH1 simultaneously (when CHPS<1:0> = 01)

0 = Samples multiple channels individually in sequence

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