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DS1864 датащи(PDF) 21 Page - Dallas Semiconductor

номер детали DS1864
подробное описание детали  SFP Laser Controller and Diagnostic IC
PDF  72 Pages
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производитель  DALLAS [Dallas Semiconductor]
домашняя страница  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS1864 датащи(HTML) 21 Page - Dallas Semiconductor

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SFP Laser Controller and
Diagnostic IC
____________________________________________________________________
21
shutdown signals. Alarm and warning thresholds keep
the system functioning within user-programmed para-
meters. All alarm and warning flags are active high.
Fast-trip alarms and warnings can be configured to
overwrite the diagnostic flags for the same function.
Laser safety features are also implemented to accept
and send alarm signals to control laser activity.
Fast-Trips
The three monitor channels (MON1, MON2, and MON3)
have associated fast channels. A sequencer with fast-trip
comparators monitors the three voltage channels: MON1
(Bias Current (IBI)), MON2 (Transmitted Power (TXP)),
and MON3 (Received Power (RIN)). These signals are the
same raw (uncalibrated) signals used for the diagnostic
circuits. Five fast-trip flags (alarms and warnings) are
generated: high-bias alarm (HBAL), high-bias warning
(HBWA), high transmitted power (HTXP), low transmitted
power (LTXP), and loss of received signal (LOS), see
Figure 12. These flags are located in Lower Memory, byte
73h. These flags are latched temporarily by design as
required by the sequencer. In order to disable a com-
parator, set its threshold to 00h for low flags and FFh for
high flags. The FT_enable bit (bit 3, byte 80h, Table 04h
(Table 01h in DS1859 configuration)) determines if fast-
trip alarms are enabled or disabled.
The thresholds for HBAL and HBWA can be pro-
grammed to be temperature compensated. Registers
B0h to B7h for HBAL and B8h to BFh for HBWA of
Table 04h (Table 01h in DS1859 configuration) are
where the temperature-compensated alarm and warn-
ing thresholds are stored. Register DBh of Table 04h
(Table 01h in DS1859 configuration) is the location of
the HTXP programmable threshold. Register DCh of
Table 7. MON3 Configuration Registers
FINE MODE
COURSE
GAIN REGISTER
98 to 99h,
Table 04h*
9A to 9Bh,
Table 04h*
OFFSET REGISTER
A8 to A9h,
Table 04h*
AA to ABh,
Table 04h*
RIGHT SHIFT REGISTER
8Fh,
Table 04h*
N/A
RSSIC AND RSSIF BITS
8Ah, Table 04h*
RSSIS BIT
77h, Lower Memory
MON3 MEASUREMENT
68 to 69h, Lower Memory
*Table 04h in DS1852 configuration or Table 01h in DS1859
configuration.
Table 6. MON3 Hysteresis Threshold
Values
# OF RIGHT
SHIFTS
FINE MODE MAX
(HEX)
COURSE MODE
MIN* (HEX)
0
FFF8
F000
1
7FFC
7800
2
3FFE
3C00
3
1FFF
1E00
4
0FFF
0F00
5
07FF
0780
6
03FF
03C0
7
01FF
01E0
*This is the minimum reported course mode conversion.
MON3
TIMESLICE
END OF MON3
TIMESLICE
PERFORM FINE
MODE CONVERSION
REPORT FINE
CONVERSION RESULT
REPORT COURSE
CONVERSION RESULT
DID PRIOR MON3
TIMESLICE RESULT IN A
COURSE CONV.?
(RSSIS = 1?)
RSSIS BIT = 0
RSSIS BIT = 1
WAS CURRENT FINE
MODE CONV. <
COURSE MIN?
PERFORM COURSE
MODE CONVERSION
DID CURRENT FINE
MODE CONV.
REACH MAX?
N
Y
Y
Y
N
N
Figure 15. Dual-Range Functionality Flowchart



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