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TDA8960 датащи(PDF) 18 Page - NXP Semiconductors |
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TDA8960 датащи(HTML) 18 Page - NXP Semiconductors |
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18 / 32 page ![]() 1999 Jun 14 18 Philips Semiconductors Preliminary specification ATSC 8-VSB demodulator and decoder TDA8960 Table 10 I2C-bus control register overview (write); note 1 Note 1. Do not write past address 09H. Table 11 I2C-bus control registers (default settings after reset) FUNCTION ADDRESS D7 D6 D5 D4 D3 D2 D1 D0 Operation 00H GNRL_RST INITIAL_RST Reserved 01H Reserved 02H Operation 03H AGC_THRES Reserved 04H Reserved 05H Reserved 06H Reserved 07H Carrier recovery 08H AD_FMT CR_INV Timing recovery 09H INTMOD FUNCTION ADDRESS D7 D6 D5 D4 D3 D2 D1 D0 Operation 00H 00000000 Reserved 01H 00000000 Reserved 02H 00000100 Operation 03H 00000000 Reserved 04H 00000010 Reserved 05H 10000000 Reserved 06H 00000000 Reserved 07H 11001010 Carrier recovery 08H 00000100 Timing recovery 09H 00000000 Fig.9 A master-transmitter addresses a slave receiver with a 7-bit address (read access). (5) A = acknowledge (SDA LOW). (6) A = not acknowledge (SDA HIGH). (7) P = STOP condition. (8) Data transferred (n bytes + acknowledge). (1) From master to slave. (2) S = START condition. (3) Logic 1 (read). (4) From slave to master. handbook, full pagewidth MGR608 S A DATA A (8) DATA P SLAVE ADDRESS (1)(2) (1)(3) (4)(5) (4) (1)(5) (1)(6) (4) (1)(7) (1) R/W A |
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