DS2405

READ/WRITE TIMING DIAGRAM Figure 6 (cont.)

Read-Data Time Slot

60

1

0

1

RESISTOR

MASTER

DS2405

CRC GENERATION

To validate the data transmitted from the DS2405, the bus master may generate a CRC value from the

data as it is received. This generated value is compared to the value stored in the last 8 bits of the

DS2405. If the two CRC values match, the transmission is error-free.

The equivalent polynomial function of this CRC is:

For more details, see the Book of DS19xx iButton Standards.

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