PS810 datasheet(25/46 Pages) MICROCHIP

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DS21904C-page 25

PS810

8.0

COMMUNICATION

8.1

SMBus/I2C Battery Data Interface

The PS810 uses a two-pin communication protocol

compatible with the System Management Bus (SMBus)

and the Inter IC Communication (I2C™) protocols to

communicate to the host. One pin is the clock and one

is the data. The SMBus/I2C port responds to all battery

data commands listed in Table 8-1. To receive informa-

tion about the battery, the host sends the appropriate

commands to the SMBus/I2C port. The battery data

command set is summarized in Table 8-1.

The PS810 SMBus/I2C communications port is fully

compliant with the System Management Bus specifica-

tion, version 1.1 and supports all previous and new

requirements, including bus time-outs and PEC (CRC-8)

error checking. The SMBus port serves as a slave for

both read and write functions. SMBus slave protocols

supported include Read Word, Write Word, Read Block

and Write Block, all with or without PEC (CRC-8) error

correction.

The SMBus protocol used for PS810 is for the host to

master the SMBus. PS810 operates only in Slave

mode. The master will send the PS810 device’s SMBus

write address (0x16 for write) followed by the command

code. The host will then send the PS810 device’s read

address (0x17 for read) and await data. As a response

to the read request, the PS810 will send all the data

bytes required.

FIGURE 8-1:

SMBus TIMING

tHD:STA

tBUF

tLOW

tHD:STA

tHIGH

tSU:DAT

tSU:STA

tSU:STO

SCL

SDA

SCL

SDA

tLOW:MEXT

SCLACK

Note: SCLACK is the Acknowledge related clock pulse generated by the master.

SCLACK

tLOW:MEXT

tLOW:SEXT

tSU:STA

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