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TC9401 датащи(PDF) 11 Page - Microchip Technology |
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TC9401 датащи(HTML) 11 Page - Microchip Technology |
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11 / 24 page ![]() © 2006 Microchip Technology Inc. DS21483C-page 11 TC9400/9401/9402 5.2.3 CREF The exact value is not critical and may be used to trim the full scale frequency (see Section 7.1 “Input/Out- put Relationships”, Input/Output Relationships). Glass film or air trimmer capacitors are recommended because of their stability and low leakage. Locate as close as possible to Pins 5 and 3 (see Figure ). FIGURE 5-1: Recommended C REF vs. V REF 5.2.4 VDD, VSS Power supplies of ±5V are recommended. For high accuracy requirements, 0.05% line and load regulation and 0.1 μF disc decoupling capacitors, located near the pins, are recommended. 5.3 Adjustment Procedure Figure 3-1 shows a circuit for trimming the zero loca- tion. Full scale may be trimmed by adjusting RIN, VREF, or CREF. Recommended procedure for a 10 kHz full scale frequency is as follows: 1. Set VIN to 10 mV and trim the zero adjust circuit to obtain a 10 Hz output frequency. 2. Set VIN to 10V and trim either RIN, VREF, or CREF to obtain a 10 kHz output frequency. If adjustments are performed in this order, there should be no interaction and they should not have to be repeated. 5.4 Improved Single Supply V/F Converter Operation A TC9400, which operates from a single 12 to 15V vari- able power source, is shown in Figure 5-2. This circuit uses two Zener diodes to set stable biasing levels for the TC9400. The Zener diodes also provide the refer- ence voltage, so the output impedance and tempera- ture coefficient of the Zeners will directly affect power supply rejection and temperature performance. Full scale adjustment is accomplished by trimming the input current. Trimming the reference voltage is not recommended for high accuracy applications unless an op amp is used as a buffer, because the TC9400 requires a low- impedance reference (see Section 4.9 “VREF”, VREF pin description, for more information). The circuit of Figure 5-2 will directly interface with CMOS logic operating at 12V to 15V. TTL or 5V CMOS logic can be accommodated by connecting the output pull-up resistors to the +5V supply. An optoisolator can also be used if an isolated output is required; also, see Figure 5-3. 500 400 300 200 100 0 -1 -2 -3 -4 -5 -6 -7 VREF (V) 10 kHz 100 kHz VDD = +5V VSS = -5V RIN = 1MW VIN = +10V TA = +25°C |
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