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VNF9D5F датащи(PDF) 37 Page - STMicroelectronics |
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VNF9D5F датащи(HTML) 37 Page - STMicroelectronics |
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37 / 106 page ![]() CHLOFFTCRxx Channel latch OFF timer control register Address: 0x10h Type: R/W Reset: 0 Description: Channel latch OFF timer control register In case of power limitation or thermal shutdown event, the output channel behavior is configurable (by means of 2 bits) as latch off or time limited auto-restart (tblanking). By default, the time limited auto-restart mode is the set behavior. In latched off-state, the fault must be cleared to re-enable the output channel after an overtemperature or power limitation event. The blanking window duration (tblanking) in case of power limitation or thermal shutdown events can be set, per channel, according to the following table: Table 37. Programmable tblanking values CHLOFFTCRx3 CHLOFFTCRx2 CHLOFFTCRx1 CHLOFFTCRx0 0 0 0 0 Latch OFF (default) 0 0 0 1 16 ms 0 0 1 0 32 ms … … … … … 1 1 1 0 224 ms 1 1 1 1 240 ms VNF9D5F SPI functional description DS13946 - Rev 6 page 37/106 |
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