6.2

Microcontroller unit

The integrated MCU is the STM32G031x8 with the following main characteristics:

•

Core: ARM® Cortex® -M0+ 32-bit CPU, frequency up to 64 MHz

•

Memories: 8 KB of SRAM, 64 KB of flash memory

•

ADC 12-bit resolution and 0.4 µs sampling time

•

5-channel DMA controller with flexible mapping

•

Full set of interfaces: UART, I2C, SPI, LPUART

Note:

For more details, refer to the STM32G031x8 datasheet on www.st.com.

6.2.1

Memories and boot mode

The device has the following features:

•

8 Kbytes of embedded SRAM

•

The non-volatile memory is divided into two arrays:

–

64 Kbytes of embedded flash memory for programs and data

–

Option bytes

The flash memory embeds the Error Correction Code (ECC) feature supporting:

•

Single error detection and correction.

•

Double error detection.

•

The address of the ECC fail can be read from the ECC register.

•

1 Kbyte (128 double word) OTP (one-time programmable) bytes for user data. The OTP data cannot be

erased and can be written only once.

Flexible protections can be configured thanks to the option bytes:

•

Readout protection (RDP) to protect the whole memory with the following options:

–

Level 0: no readout protection.

–

Level 1: memory readout protection; the flash memory cannot be read from or written to if either the

debug features are connected or the boot from RAM or bootloader are selected.

–

Level 2: chip readout protection; the debug features (serial wire), the boot from RAM and the

bootloader selection are disabled. This selection is irreversible.

•

Write protection (WRP): the protected area is protected against erasing and programming.

•

Proprietary code readout protection (PCROP): a part of the flash memory can be protected against read

and write from third parties.

•

Securable memory area: a part of flash memory can be configured by option bytes to be securable.

At startup, the boot pin and boot selector option bit are used to select one of the three boot options:

•

Boot from User flash memory.

•

Boot from System Memory.

•

Boot from embedded SRAM.

The boot pin is shared with a standard GPIO and can be enabled through the boot selector option bit.

The bootloader is located in System Memory. It is used to reprogram the flash memory by one of the following

interfaces:

•

USART on pins PA9/PA10 or PA2/PA3.

•

I2C-bus on pins PB6/PB7 or PB10/PB11.

6.2.2

Power management

The VDD is the external power supply for the internal regulator and the system analog such as reset, power

management and internal clocks. It is provided externally through the VDD/VDDA pin.

The VDDA is the analog power supply for ADC and the voltage reference buffer. The VDDA voltage level is identical

to the VDD voltage as it is provided externally through the VDD/VDDA pin.

The VBAT is the power supply (through a power switch) for RTC, TAMP, low-speed external 32.768 kHz oscillator,

and backup registers when VDD is not present. VBAT is provided externally through the VBAT pin.

STSPIN32G0601

Device description

DS14489 - Rev 1

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