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STA020D датащи(PDF) 8 Page - STMicroelectronics

номер детали STA020D
подробное описание детали  96kHz DIGITAL AUDIO INTERFACE TRANSMITTER
PDF  11 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STA020D датащи(HTML) 8 Page - STMicroelectronics

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Transparent Mode
In certain applications it is desirable to receive digi-
tal audio data with the STA120 and retransmit it
with the STA020D. In this case, channel status,
user and validity information must pass through un-
altered. For studio environments, AES recom-
mends that signal timing synchronization be main-
tained
throughout
the
studio.
Frame
synchronization of digital audio signals input to and
output from a piece of equipment must be within +/-
5%.
The transparent mode of the STA020D is se-
lected by setting TRNPT, pin 24, high. In this
mode, the CBL pin becomes an input, allowing di-
rect connection of the outputs of the STA120 to
the inputs of the STA020D as shown in Figure
18. The transmitter and receiver are synchro-
nized by the FSYNC signal. CBL specifies the
start of a new channel status block boundry, al-
lowing the transmit block structure to be slaved to
the block structure of the receiver.
In the transparent mode, C, U and V are now
transmitted with the current audio sample as
shown in Figure 5 (TRNPT high) and the dedi-
cated channel status pins are ignored.
When FSYNC is a word clock (Format 2), CBL is
sampled when left C, U, V are sampled. When
FSYNC is Left/Right, CBL is sampled when left
C, U, V are sampled. The channel status block
boundry is reset when CBL transitions from low to
high (based on two successive samples of CBL).
MCK for the STA020D is normally expected to be
128 times the sample frequency, in the trasparent
mode MCK must be 256 Fs.
Professional Mode
Setting PRO low places the STA020D in profes-
sional mode as shown in Figure 6. In professional
mode, channel status bit 0 is transmitted as a one
and bits 1, 2, 3, 4, 6, 7 and 9 can be controlled
via dedicated pins. The pins are actually the in-
verse of the identified bit.
For example, tying the C1 pin low places a one in
channel status bit 1. As shown in the application
Note, Overview of AES/EBU Digital Audio Inter-
face Data Structures, C1 indicates audio/non-
audio; C6 and C7 determine the sample fre-
quency and C9 allows the encoded channel
mode to be stereophonic. EM1 and EM0 deter-
mine emphasis and encode C2, C3, C4 as shown
in Table 2. The dedicated channel status pins are
read at the appropriate time and are logically
OR’ed with data input on the channel status port, C.
In Transparent Mode, these dedicated channel
status pins are ignored and channel status bits
are input at the C pin.
Consumer Mode
Setting PRO high places the STA020D in con-
sumer mode which redefines the pins as shown in
Figure 7. In consumer mode, channel status bit 0 is
transmitted as a zero and channel status bits 2, 3,
8, 9, 15, 24 and 25 are controlled via dedicated
pins.
The pins are actually the inverse of the bit so if
pin C2 is tied high, channel status bit 2 will be
transmitted as a zero. Also, FC0 and FC1 are en-
coded versions of channel status bits 24 and 25,
which define the sample frequency.
When FC0 and FC1 are both high, the part is
placed in a CD submode which activates the CD
subcode port. This submode is described in detail
in the next section. Table 3 describes the encod-
ing of C24 and C25 through the FC1 and FC0
pins. According to AES/EBU standards, C2 is
copy prohibit/permit. C3 specifies pre-emphasis,
C8 and C9 define the category code and C15
identifies the generation status of the transmitted
material (i.e. first generation, second generation).
Table 2. Emphasis Encoding
EM1
EM0
C2
C3
C4
0
0111
0
1110
1
0100
1
1000
Table 3. Sample Frequency Encoding
FC1
FC0
C24
C25
Comments
00
00
44.1kHz
01
01
48kHz
10
11
32kHz
1
1
0
0
44.1kHz, CD Mode
MCK
CBL
C
U
V
FSYNC
DATA
PROCESSING
RXP
RXN
SCK
STA120
STA020
TXN
TXP
TRNPT
V+
D97AU605
SDATA
Figure 5. Transparent Mode Interface.
STA020D
8/11



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