© 2007 Microchip Technology Inc.

DS21335E-page 11

TC1014/TC1015/TC1185

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

3.1

voltage. Like all low dropout linear regulators, low

source impedance is necessary for the stable

operation of the LDO. The amount of capacitance

required to ensure low source impedance will

depend on the proximity of the input source

capacitors or battery type. For most applications,

1.0 µF of capacitance will ensure stable operation

of the LDO circuit. The type of capacitor used can

be ceramic, tantalum or aluminum electrolytic.

The low Effective Series Resistance (ESR) char-

acteristics of the ceramic will yield better noise

and Power Supply Ripple Rejection (PSRR)

performance at high frequency.

3.2

Ground Terminal (GND)

Connect the ground pin to the input voltage

return. For the optimal noise and PSRR

performance, the GND pin of the LDO should be

tied to a quiet circuit ground. For applications

have switching or noisy inputs tie the GND pin to

the return of the output capacitor. Ground planes

help lower inductance and voltage spikes caused

by fast transient load currents and are

recommended for applications that are subjected

to fast load transients.

3.3

Shutdown (SHDN)

The Shutdown input is used to turn the LDO on

and off. When the SHDN pin is at a logic high

level, the LDO output is enabled. When the

SHDN pin is pulled to a logic low, the LDO output

is disabled. When disabled, the quiescent current

used by the LDO is less than 0.5 µA max.

3.4

Bypass

Connecting a low-value ceramic capacitor to the

Bypass pin will further reduce output voltage

noise and improve the PSRR performance of the

LDO. While smaller and larger values can be

used, these affect the speed at which the LDO

output voltage rises when the input power is

applied. The larger the bypass capacitor, the

slower the output voltage will rise.

3.5

connect one side of the LDO output capacitor as

Pin No.

(5-Pin SOT-23)

Symbol

Description

Unregulated supply input.

2

GND

Ground terminal.

3

SHDN

Shutdown control input. The regulator is fully enabled when a logic high is applied to

this input. The regulator enters shutdown when a logic low is applied to this input.

During shutdown, output voltage falls to zero and supply current is reduced to

0.5 µA (maximum).

4

Bypass

Reference bypass input. Connecting a 470 pF to this input further reduces output

noise.

Regulated voltage output.