MCP3002-ISLASHMS datasheet(16/28 Pages) MICROCHIP

16 / 28 page

MCP3002

DS21294C-page 16

6.2

Maintaining Minimum Clock Speed

When the MCP3002 initiates the sample period, charge

is stored on the sample capacitor. When the sample

period is complete, the device converts one bit for each

clock that is received. It is important for the user to note

that a slow clock rate will allow charge to bleed off the

sample cap while the conversion is taking place. At

85°C (worst case condition), the part will maintain

proper charge on the sample cap for 700 µs at

DD = 2.7V and 1.5 ms at VDD = 5V. This means that at

DD = 2.7V, the time it takes to transmit the 1.5 clocks

for the sample period and the 10 clocks for the actual

conversion must not exceed 700 µs. Failure to meet

this criteria may induce linearity errors into the conver-

sion outside the rated specifications.

6.3

Buffering/Filtering the Analog Inputs

If the signal source for the A/D Converter is not a low

impedance source, it will have to be buffered or inaccu-

rate conversion results may occur. It is also recom-

mended that a filter be used to eliminate any signals

that may be aliased back in to the conversion results.

This is illustrated in Figure 6-3 below where an op amp

is used to drive, filter, and gain the analog input of the

MCP3002. This amplifier provides a low impedance

output for the converter input and a low pass filter,

which eliminates unwanted high frequency noise.

Low pass (anti-aliasing) filters can be designed using

Microchip’s interactive FilterLab™ software. FilterLab

will calculate capacitor and resistors values, as well as,

determine the number of poles that are required for the

application. For more information on filtering signals,

see the application note AN699 “Anti-Aliasing Analog

Filters for Data Acquisition Systems.”

FIGURE 6-3:

Typical

Anti-Aliasing

Filter

Circuit

(2 pole Active Filter).

6.4

Layout Considerations

When laying out a printed circuit board for use with

analog components, care should be taken to reduce

noise wherever possible. A bypass capacitor should

always be used with this device and should be placed

as close as possible to the device pin. A bypass capac-

itor value of 1 µF is recommended.

Digital and analog traces should be separated as much

as possible on the board and no traces should run

underneath the device or the bypass capacitor. Extra

precautions should be taken to keep traces with high

frequency signals (such as clock lines) as far as possi-

ble from analog traces.

Use of an analog ground plane is recommended in

order to keep the ground potential the same for all

devices on the board. Providing VDD connections to

devices in a “star” configuration can also reduce noise

by eliminating current return paths and associated

errors. See Figure 6-4. For more information on layout

tips when using A/D converters, refer to AN-688 “Lay-

out Tips for 12-Bit A/D Converter Applications”.

FIGURE 6-4:

VDD traces arranged in a ‘Star’

configuration in order to reduce errors caused by

current return paths.

MCP3002

10 µF

IN-

IN+

1µF

MCP601

Connection

Device 1

Device 2

Device 3

Device 4

MCP3002-I/MS датащи(PDF) 16 Page - Microchip Technology

MCP3002-I/MS датащи(HTML) 16 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

датащи скачать

ссылки URL