ALVD

|||||||||||||||

WITH VOLTAGE CONTROL

7.0 x 5.0 x 1.8mm

Compliant

ABRACON IS

ISO 9001 / QS 9000

CERTIFIED

ABRACON IS

ISO 9001 / QS 9000

CERTIFIED

CERAMIC SMD CRYSTAL CLOCK OSCILLATOR

LVDS:

PIN ASSIGNMENTS

PIN #

1

2

3

4

5

6

TRI-STATE PIN OPERATION:

0 (Default)

1

0

1

0

1(Default)

0

1(Default)

*Connect to VDD for logic level "1", connect to ground for logic level "0".

C

CMOS

Disabled

Enabled

V

LVDS

Disabled

Enabled

OUTPUT TYPE

OPTION

PIN 2 logic level*

Disabled

Enabled

P1

PECL1

d

n

u

o

r

G

D

N

G

.

t

u

p

t

u

O

S

O

M

C

r

o

,

S

D

V

L

,

L

C

E

P

Q

Output State (Tri-state)

P

PECL

Enabled

Disabled

VDD Connection.

N

O

I

T

P

I

R

S

E

D

e

m

a

N

l

o

r

t

n

o

C

e

g

a

t

l

o

V

c

V

e

t

a

t

s

i

r

T

e

t

a

t

s

i

r

T

.

C

N

r

o

,

S

D

V

L

,

L

C

E

P

y

r

a

t

n

e

m

il

p

m

o

C

Q

OPTIONS & PART IDENTIFICATION:

(Left blank if standard)

R

±25ppm max.

Blank

Bulk

K

±30ppm max.

H

±35ppm max.

D

-10ºC~60ºC

E

-20ºC~70ºC

F

-30ºC~70ºC

P

PECL

N100

±100ppm

N

-30ºC~85ºC

P1

PECL1

L

-40ºC~85ºC

V

LVDS

CCMOS

Frequency

Operating Temp.

Output Level

Packaging

Pullability

Frequency Stability

T

Tape and

Reel

XX.XXXXMHz

ALVD - Frequency -

-

-

-

-

Output Clock Duty Cycle @ 1.25V: 45% min, 50% typical, 55% max

VDD Magnitude Change (

ΔV

30332 Esperanza, Rancho Santa Margarita, California 92688

Revised: 07.11.07

Visit www.abracon.com for Terms & Conditions of Sale